In this role, you will collaborate with experienced engineers and cross-functional teams to support chip package co-design activities for electro-optical transceivers using GF's Photonix platform and ...
In this role, you will collaborate with experienced engineers and cross-functional teams to support chip package co-design activities for electro-optical transceivers using GF's Photonix platform and ...
Assistwith thermal, mechanical, electrical, and optical chip package co-design analysis under the guidance of experienced engineers. * Contribute to design rule development, manufacturability ...
Assistwith thermal, mechanical, electrical, and optical chip package co-design analysis under the guidance of experienced engineers. * Contribute to design rule development, manufacturability ...
... software engineering, and systems integration. www.tekwissen.com The position is for 1 ... design experience. Job Duty 1 - Full chip integration for memory chips and Array Diagnostic ...
... software engineering, and systems integration. www.tekwissen.com The position is for 1 ... design experience. Job Duty 1 - Full chip integration for memory chips and Array Diagnostic ...
Advanced Packaging Design Verification & Physical Validation Engineer
Burlington, VT · On-site
$136K - $166K/yr
Many of the new designs require multi-chip and multiple component configurations with high-speed IP ... engineer to join our Advanced Packaging Design team in Burlington, VT as a Package Design ...
Advanced Packaging Design Verification & Physical Validation Engineer
Burlington, VT · On-site
$136K - $166K/yr
Many of the new designs require multi-chip and multiple component configurations with high-speed IP ... engineer to join our Advanced Packaging Design team in Burlington, VT as a Package Design ...
Advanced Packaging Design Verification & Physical Validation Engineer
Burlington, VT · On-site
$134K - $163K/yr
Many of the new designs require multi-chip and multiple component configurations with high-speed IP ... engineer to join our Advanced Packaging Design team in Burlington, VT as a Package Design ...
New
Advanced Packaging Design Verification & Physical Validation Engineer
Burlington, VT · On-site
$134K - $163K/yr
Many of the new designs require multi-chip and multiple component configurations with high-speed IP ... engineer to join our Advanced Packaging Design team in Burlington, VT as a Package Design ...
New
Advanced Packaging Design Verification & Physical Validation Engineer
Burlington, VT · On-site
$136K - $166K/yr
Many of the new designs require multi-chip and multiple component configurations with high-speed IP ... engineer to join our Advanced Packaging Design team in Burlington, VT as a Package Design ...
Advanced Packaging Design Verification & Physical Validation Engineer
Burlington, VT · On-site
$136K - $166K/yr
Many of the new designs require multi-chip and multiple component configurations with high-speed IP ... engineer to join our Advanced Packaging Design team in Burlington, VT as a Package Design ...
Your Team, Your Impact The Central Engineering Test Chip Development team provides hardware ... What You Can Expect Job Responsibilities Design and verify test chip experiments using Verilog ...
Your Team, Your Impact The Central Engineering Test Chip Development team provides hardware ... What You Can Expect Job Responsibilities Design and verify test chip experiments using Verilog ...
Your Team, Your Impact The Central Engineering Test Chip Development team provides hardware ... Design and verify test chip experiments using Verilog simulation. * Develop, generate, simulate ...
New
Your Team, Your Impact The Central Engineering Test Chip Development team provides hardware ... Design and verify test chip experiments using Verilog simulation. * Develop, generate, simulate ...
New
PMTS Photonics Packaging Design Integration
Essex Junction, VT · On-site
$131K - $241K/yr
As a Photonic Packaging Design Integration Engineer within GF's APPC, you will lead the development ... The candidate will bring a strong focus on thermal, mechanical, electrical, and optical chip ...
PMTS Photonics Packaging Design Integration
Essex Junction, VT · On-site
$131K - $241K/yr
As a Photonic Packaging Design Integration Engineer within GF's APPC, you will lead the development ... The candidate will bring a strong focus on thermal, mechanical, electrical, and optical chip ...
PMTS Photonics Packaging Design Integration
Essex Junction, VT · On-site
$131K - $241K/yr
As a Photonic Packaging Design Integration Engineer within GF's APPC, you will lead the development ... The candidate will bring a strong focus on thermal, mechanical, electrical, and optical chip ...
PMTS Photonics Packaging Design Integration
Essex Junction, VT · On-site
$131K - $241K/yr
As a Photonic Packaging Design Integration Engineer within GF's APPC, you will lead the development ... The candidate will bring a strong focus on thermal, mechanical, electrical, and optical chip ...
Packaging Integration Engineer
Essex Junction, VT · Hybrid
$143K - $247K/yr
Own the definition, design, and qualification of optical packaging architectures forSiPh-based ... Develop and implement scalable fiber-to-chip coupling strategies (e.g., V-groove, passive alignment ...
Packaging Integration Engineer
Essex Junction, VT · Hybrid
$143K - $247K/yr
Own the definition, design, and qualification of optical packaging architectures forSiPh-based ... Develop and implement scalable fiber-to-chip coupling strategies (e.g., V-groove, passive alignment ...
Packaging Integration Engineer
Essex Junction, VT · On-site
$143K - $247K/yr
Own the definition, design, and qualification of optical packaging architectures for SiPh-based ... Develop and implement scalable fiber-to-chip coupling strategies (e.g., V-groove, passive alignment ...
Packaging Integration Engineer
Essex Junction, VT · On-site
$143K - $247K/yr
Own the definition, design, and qualification of optical packaging architectures for SiPh-based ... Develop and implement scalable fiber-to-chip coupling strategies (e.g., V-groove, passive alignment ...
MTS Packaging Integration Engineer
Essex Junction, VT · On-site
$94K - $175K/yr
... Chip assembly. Focus on product and module reliability, package risk factors, packaging design rules, materials selection criteria, definition of electrical, photonic and thermal stress plan for ...
MTS Packaging Integration Engineer
Essex Junction, VT · On-site
$94K - $175K/yr
... Chip assembly. Focus on product and module reliability, package risk factors, packaging design rules, materials selection criteria, definition of electrical, photonic and thermal stress plan for ...
Packaging Integration Engineer (2026 New College Graduate)
Essex Junction, VT · On-site
$85K - $146K/yr
Contribute to design rule development and manufacturability assessments for new products ... Knowledge of advanced packaging technologies including flip-chip, chiplets, 2.5D, or 3D integration.
Packaging Integration Engineer (2026 New College Graduate)
Essex Junction, VT · On-site
$85K - $146K/yr
Contribute to design rule development and manufacturability assessments for new products ... Knowledge of advanced packaging technologies including flip-chip, chiplets, 2.5D, or 3D integration.
MTS Packaging Integration Engineer
Essex Junction, VT · Hybrid
$94K - $175K/yr
... Chip assembly. Focus on product and module reliability, package risk factors, packaging design rules, materials selection criteria, definition of electrical, photonic and thermal stress plan for ...
MTS Packaging Integration Engineer
Essex Junction, VT · Hybrid
$94K - $175K/yr
... Chip assembly. Focus on product and module reliability, package risk factors, packaging design rules, materials selection criteria, definition of electrical, photonic and thermal stress plan for ...
Packaging Integration Engineer (2026 New College Graduate)
Essex Junction, VT · On-site
$85K - $146K/yr
Contribute to design rule development and manufacturability assessments for new products ... Knowledge of advanced packaging technologies including flip-chip, chiplets, 2.5D, or 3D integration.
Packaging Integration Engineer (2026 New College Graduate)
Essex Junction, VT · On-site
$85K - $146K/yr
Contribute to design rule development and manufacturability assessments for new products ... Knowledge of advanced packaging technologies including flip-chip, chiplets, 2.5D, or 3D integration.
Quantum PDK Engineer
Essex Junction, VT · On-site
$98K - $176K/yr
The engineer will work on compact modeling, device libraries, test chip development, and EDA integration, ensuring accurate, validated, and production-ready design collateral. The position emphasizes ...
Quantum PDK Engineer
Essex Junction, VT · On-site
$98K - $176K/yr
The engineer will work on compact modeling, device libraries, test chip development, and EDA integration, ensuring accurate, validated, and production-ready design collateral. The position emphasizes ...
Quantum PDK Engineer
Essex Junction, VT · On-site
$98K - $176K/yr
The engineer will work on compact modeling, device libraries, test chip development, and EDA integration, ensuring accurate, validated, and production-ready design collateral. The position emphasizes ...
Quantum PDK Engineer
Essex Junction, VT · On-site
$98K - $176K/yr
The engineer will work on compact modeling, device libraries, test chip development, and EDA integration, ensuring accurate, validated, and production-ready design collateral. The position emphasizes ...
... design, development, and fabrication services to some of the world's most inspired technology ... Flip-chip / micro-bump / superconducting bump attach * Die-to-wafer (D2W), wafer-to-wafer (W2W ...
... design, development, and fabrication services to some of the world's most inspired technology ... Flip-chip / micro-bump / superconducting bump attach * Die-to-wafer (D2W), wafer-to-wafer (W2W ...
... design, development, and fabrication services to some of the world's most inspired technology ... Flip-chip / micro-bump / superconducting bump attach * Die-to-wafer (D2W), wafer-to-wafer (W2W ...
... design, development, and fabrication services to some of the world's most inspired technology ... Flip-chip / micro-bump / superconducting bump attach * Die-to-wafer (D2W), wafer-to-wafer (W2W ...
Chip Design Engineer information
See Vermont salary details
$43.1K - $54.5K
2% of jobs
$54.5K - $65.9K
11% of jobs
$72K is the 25th percentile. Wages below this are outliers.
$65.9K - $77.3K
23% of jobs
The median wage is $84.6K / yr.
$77.3K - $88.7K
22% of jobs
$88.7K - $100.1K
17% of jobs
$100.4K is the 75th percentile. Wages above this are outliers.
$100.1K - $111.5K
9% of jobs
$111.5K - $122.9K
6% of jobs
$122.9K - $134.3K
3% of jobs
$134.3K - $145.7K
3% of jobs
$145.7K - $157.1K
2% of jobs
$157.1K - $168.5K
1% of jobs
$43.1K
$93.7K
$168.5K
How much do chip design engineer jobs pay per year?
What is a chip design engineer?
A Chip Design Engineer is responsible for designing and developing integrated circuits (ICs) used in electronic devices. They work with hardware description languages (HDLs) like Verilog or VHDL to create digital or analog circuit designs. Their role includes logic design, verification, simulation, and testing to ensure performance and power efficiency. They collaborate with teams across hardware, software, and manufacturing to bring chips from concept to production. Chip Design Engineers are essential in industries like consumer electronics, automotive, and telecommunications.
What are some typical projects or daily tasks for a chip design engineer?
As a Chip Design Engineer, your daily tasks often include designing and simulating integrated circuits, reviewing schematics, writing and verifying code in hardware description languages, and collaborating closely with layout engineers and verification teams. You may also participate in design reviews, troubleshoot potential issues, and optimize chip performance to meet specific requirements. Working with cross-functional teams, including software engineers and product managers, is common to ensure the chip integrates seamlessly with end products. This role provides opportunities to see your designs progress from concept to final manufacturing, offering valuable hands-on experience at each stage of development.
What are the key skills and qualifications needed to thrive as a chip design engineer?
To thrive as a Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and experience with VLSI principles, usually backed by a relevant degree. Proficiency with industry-standard tools like Cadence, Synopsys, and experience in HDL languages (such as Verilog or VHDL) is highly valued, as are certifications like Certified IC Designer. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set you apart. These competencies are critical for developing reliable, high-performance chips in a collaborative and deadline-driven environment.
How much do chip design engineers make?
What does a chip design engineer do?
What is the salary of chip design engineer?
What job categories do people searching Chip Design Engineer jobs in Vermont look for?
The top searched job categories for Chip Design Engineer jobs in Vermont are:

Packaging Design Integration Engineer (2026 New College Graduate)
Essex Junction, VT • On-site
Full-time
Re-posted 2 days ago
GlobalFoundries rating
8.3
Based on 35 frontline employees who took The Breakroom Quiz
65th of 547 rated manufacturers
Job description
GlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world's most inspired technology companies. With a global manufacturing footprint spanning three continents, GF makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.
New College Graduates Overview
We offer many full-time employment paths for recent graduates, which provide accelerated training in a fast-paced work environment, cross-functional working opportunities, and talent mobility. New college graduates are provided with mentorship, networking, and leadership opportunities, which give our new team members life-long connections and skills.
Summary of Role
GlobalFoundries is seeking a highly motivated New College Graduate to join the Advanced Packaging and Silicon Photonics team as a Packaging Design Integration Engineer. In this role, you will collaborate with experienced engineers and cross-functional teams to support chip package co-design activities for electro-optical transceivers using GF's Photonix platform and advanced 2.5D/3D packaging technologies.
The engineer will contribute to thermal, mechanical, electrical, and optical design integration activities, including design rule development, simulation/modeling support, manufacturability assessments, and reliability-focused design characterization. This role offers hands-on exposure to next-generation packaging solutions while building technical depth in silicon photonics, advanced packaging design, and engineering analysis.
Essential Responsibilities include:
- Support packaging design integration activities for silicon photonics and advanced packaging products.
- Assist with thermal, mechanical, electrical, and optical chip package co-design analysis under the guidance of experienced engineers.
- Contribute to design rule development, manufacturability assessments, and design review preparation for new package technologies.
- Use engineering data, simulations, and characterization results to help evaluate design options and identify improvement opportunities.
- Participate in cross-functional problem-solving efforts related to technical, yield, quality, and reliability concerns.
- Support development and documentation of design guidelines, technical reports, and presentation materials.
- Collaborate with design, product, process integration, manufacturing, quality, and supplier teams to support new customer products.
- Participate in continuous improvement initiatives focused on design quality, manufacturability, cost, and reliability.
Other Responsibilities
- Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
- Travel up to 10% to other GlobalFoundries facilities may be necessary. HM to confirm whether this should remain in posting.
Required Qualifications
- Education - Graduating with a Bachelor's, Master's, or PhD degree in Mechanical Engineering, Electrical Engineering, Materials Science Engineering, Chemical Engineering, Physics, Optical Engineering, or a related STEM discipline from an accredited degree program. HM to confirm final education level and majors.
- Must have at least an overall 3.0 GPA and proven good academic standing.
- Basic understanding of semiconductor packaging, silicon photonics, chip package co-design, modeling/simulation, materials science, reliability, or manufacturing processes gained through coursework, research, internships, co-ops, or academic projects.
- Demonstrated analytical and problem-solving skills.
- Experience analyzing experimental, simulation, or engineering data.
- Ability to work effectively within cross-functional teams.
- Language Fluency - English (Written & Verbal).
- Travel - Up to 10%. HM to confirm or remove.
Preferred Qualifications
- Prior related internship, co-op, research, or academic project experience in advanced packaging, silicon photonics, chip package interaction, thermal/mechanical/electrical/optical design, reliability engineering, or process integration.
- Familiarity with design or modeling tools such as HFSS, Zemax/Zmax, FloTHERM, finite element analysis, electrical simulation, optical simulation, or related engineering software. HM to confirm final tool names and whether these should be required or preferred.
- Knowledge of advanced packaging technologies including flip-chip, chiplets, 2.5D, or 3D integration.
- Familiarity with Design of Experiments (DOE), engineering statistics, or data analysis methods.
- Demonstrated prior leadership experience in the workplace, school projects, competitions, research groups, or student organizations.
- Project management skills, i.e. the ability to innovate and execute solutions that matter; the ability to navigate ambiguity.
- Strong written and verbal communication skills.
- Strong planning and organizational skills.
#NCGProgramUS
Expected Salary Range
$85,000.00 - $146,000.00
The exact Salary will be determined based on qualifications, experience and location.
If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.
An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.
GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.
All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law
What GlobalFoundries employees say
Pay
Benefits
Hours and flexibility
Workplace
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About GlobalFoundries
Sourced by ZipRecruiter
Industry
Manufacturing
Company size
10,000+ Employees
Headquarters location
Malta, NY, US
Year founded
2009