1

Asic Internships Jobs in Virginia (NOW HIRING)

Physical Design Engineer

Bristol, VA · On-site

$80 - $120/hr

Support the physical implementation of ASIC/SoC designs, including floor planning, placement, clock ... internships. * Familiarity with EDA tools for place & route, STA, and sign‑off. * Basic ...

Asic Internships information

What is the difference between Asic Internships vs ASIC Design Engineer?

AspectAsic InternshipsASIC Design Engineer
Required CredentialsTypically pursuing or recent graduates in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields
Work EnvironmentInternship programs in tech companies, labs, or research institutionsFull-time professional roles in design teams, R&D departments, or semiconductor companies
Employer & Industry UsageUsed by companies to train and evaluate potential future employeesEstablished role responsible for designing and developing ASIC chips

Asic Internships are temporary training positions aimed at gaining industry experience, while ASIC Design Engineers are full-time professionals responsible for designing integrated circuits. Internships often serve as a stepping stone to a career as an ASIC Design Engineer, providing practical skills and industry exposure.

What are the key skills and qualifications needed to thrive as an ASIC intern, and why are they important?

To thrive as an ASIC Intern, you typically need a background in electrical or computer engineering, strong understanding of digital logic design, and knowledge of hardware description languages like Verilog or VHDL. Familiarity with EDA tools such as Synopsys, Cadence, or Mentor Graphics, and experience with simulation and debugging software are highly valued. Attention to detail, effective communication, and a willingness to learn new technologies set outstanding interns apart. These skills and qualities are essential to contribute effectively to complex chip design projects and support the engineering team in delivering high-quality, functional ASIC solutions.

What is an ASIC internship?

ASIC internships are temporary positions designed for students or recent graduates to gain hands-on experience in the field of Application-Specific Integrated Circuit (ASIC) design and development. These internships typically involve working alongside experienced engineers on projects related to chip design, verification, and testing. ASIC interns often use hardware description languages like Verilog or VHDL and tools for simulation and layout. The experience helps interns develop practical skills and industry knowledge, which can be valuable for future careers in semiconductor or hardware engineering.

What types of projects do ASIC interns typically work on, and how do these assignments support their professional development?

As an ASIC intern, you will often be involved in projects such as designing, verifying, or testing digital and mixed-signal circuits. These assignments commonly include tasks like writing RTL code, running simulations, or assisting with hardware validation. Working closely with experienced engineers, you’ll gain exposure to industry-standard tools and methodologies while contributing to real product development cycles. This hands-on experience not only strengthens your technical skills but also builds your problem-solving abilities and teamwork, laying a strong foundation for a career in hardware engineering.
What are popular job titles related to Asic Internships jobs in Virginia? For Asic Internships jobs in Virginia, the most frequently searched job titles are:
What job categories do people searching Asic Internships jobs in Virginia look for? The top searched job categories for Asic Internships jobs in Virginia are:
What cities in Virginia are hiring for Asic Internships jobs? Cities in Virginia with the most Asic Internships job openings:

Physical Design Engineer

Fractile

Bristol, VA • On-site

$80 - $120/hr

Other

Posted 5 days ago


Job description

Fractile’s mission is to enable a new chapter in the AI revolution. We’re pioneering AI innovation where hardware and software join to create something extraordinary, unlocking the power of the world’s largest language models with speed increases of x100. Our team is rapidly expanding, and we're searching for visionary engineers, scientists, and thinkers who share our passion for pushing boundaries and redefining what's possible. If you're ready to join a dynamic group of innovators shaping AI's future, we want to hear from you!

We are seeking a Physical Design Engineer to contribute to our next‑generation chip designs. As a Physical Design Engineer, you will support the implementation of complex IC physical designs, from synthesis to sign‑off. You will collaborate with cross‑functional teams, including logic design, verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability.

Key Responsibilities:
  • Support the physical implementation of ASIC/SoC designs, including floor planning, placement, clock tree synthesis (CTS), routing, and sign‑off.
  • Work on synthesis, timing analysis (STA), and optimisation to achieve strong PPA metrics.
  • Assist in power planning and analysis, addressing IR drop, electromigration, and related effects.
  • Ensure design rule check (DRC), layout vs. schematic (LVS), and other physical verification compliance.
  • Collaborate with DFT engineers to integrate design‑for‑test (DFT) structures into the physical implementation.
  • Develop flows in EDA tools such as Cadence Innovus, Synopsys Fusion Compiler, Mentor Graphics Calibre, and others.
  • Work closely with RTL and architecture teams to support design feasibility, constraints, and physical‑aware RTL design.
  • Work with advanced AI tools and models to improve productivity, analysis, and design quality.
Preferred Qualifications:
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 0–5 years of experience in physical design for advanced technology nodes (e.g., 7nm, 5nm, or below), including internships.
  • Familiarity with EDA tools for place & route, STA, and sign‑off.
  • Basic understanding of CMOS technology, semiconductor physics, and process limitations.
  • Exposure to timing closure, signal integrity, IR drop analysis, and formal verification.
  • Proficiency in scripting languages like TCL, Perl, or Python for automation is a plus.
  • Excellent problem‑solving skills, communication, and teamwork in a collaborative design environment.
  • Interest in working with advanced AI tools and models as part of the design workflow.
  • Experience or coursework in high‑performance computing (HPC), AI accelerators, or networking chips is a plus.
#J-18808-Ljbffr