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Asic Engineer Jobs in Austin, TX (NOW HIRING)

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification * Develop ...

Meta is seeking highly skilled Design Engineers to join our team. In this role, you will contribute to the development of advanced technology solutions,

We are now looking for a Senior ASIC Power Engineer. NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our next-generation mobile, embedded and ...

We are now looking for a Senior ASIC Power Engineer! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our next-generation mobile, embedded and ...

SR. ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system.

ASIC DFT Engineer

Austin, TX · On-site

$165K - $241K/yr

You will be in the Silicon One development organization as an ASIC DFT Engineer . You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT ...

Showing results 21-40

Asic Engineer information

See Austin, TX salary details

$81.8K

$156.9K

$166K

How much do asic engineer jobs pay per year?

As of Sep 3, 2026, the average yearly pay for asic engineer in Austin, TX is $156,853.00, according to ZipRecruiter salary data. Most workers in this role earn between $164,500.00 and $164,500.00 per year, depending on experience, location, and employer.

What is an ASIC engineer?

An ASIC Engineer works with the design and verification of an Application-Specific Integrated Circuit (ASIC). This type of integrated circuit is designed for a specified purpose, like digital voice recording or cryptocurrency mining. An ASIC engineer has experience and skills that they use to program the integrated circuit based on defined requirements. They are capable of designing and producing ASICs that have over 100 million logic gates.

What are some typical challenges faced by ASIC engineers during the design and verification process?

ASIC Engineers often face challenges such as meeting tight performance, power, and area constraints while ensuring design correctness. Debugging complex issues during simulation and post-silicon validation can be time-consuming and require strong problem-solving skills. Additionally, coordinating with cross-functional teams—such as software, hardware, and verification engineers—is crucial to resolve integration issues and keep projects on schedule. Staying updated with evolving EDA tools and industry standards is also important for success in this role.

What are the key skills and qualifications needed to thrive as an ASIC engineer, and why are they important?

To thrive as an ASIC Engineer, you need a solid background in digital design, hardware description languages (HDLs) like Verilog or VHDL, and a relevant degree in electrical engineering or a related field. Familiarity with electronic design automation (EDA) tools, simulation software, and knowledge of the ASIC design flow are typically required, with certifications in hardware design being advantageous. Strong problem-solving abilities, attention to detail, and effective communication skills help set top performers apart. These skills are essential for delivering reliable, efficient chip designs while collaborating with cross-functional teams and meeting project specifications.

What is the difference between Asic Engineer vs FPGA Engineer?

AspectAsic EngineerFPGA Engineer
CredentialsBachelor's or Master's in Electrical Engineering, VLSI Design, or related fields; certifications like IEEE or VLSI certificationsBachelor's or Master's in Electrical Engineering, Digital Design, or related fields; similar certifications
Work EnvironmentDesigning and developing custom integrated circuits in labs or design centersImplementing and testing FPGA designs in labs or development environments
Industry UsageUsed in semiconductor companies, electronics manufacturers, and high-performance computingCommon in prototyping, testing, and flexible hardware solutions across industries

While both roles involve digital design and hardware development, Asic Engineers focus on creating custom chips for mass production, whereas FPGA Engineers work on programmable hardware for testing and rapid prototyping. The skills and certifications overlap, but their work environments and end goals differ significantly.

Are ASIC engineers in demand?

ASIC engineers are in high demand due to the growing need for custom integrated circuits in industries like telecommunications, consumer electronics, and automotive. Their expertise in hardware design, verification, and FPGA tools makes them valuable in developing efficient, specialized chips, with job growth expected to remain strong as technology advances.

How much does an ASIC engineer make?

An ASIC engineer's salary varies based on experience, location, and industry, but typically ranges from $80,000 to $150,000 annually. Senior roles or those with specialized skills in hardware description languages and verification tools can earn higher salaries, often exceeding $180,000 per year.

What does an ASIC engineer do?

An ASIC engineer designs, develops, and tests application-specific integrated circuits used in electronic devices. They work with hardware description languages like VHDL or Verilog, perform simulations, and collaborate with cross-functional teams to optimize chip performance and power efficiency. Strong knowledge of digital logic, circuit design, and CAD tools is essential for this role.

What job categories do people searching Asic Engineer jobs in Austin, TX look for?

The top searched job categories for Asic Engineer jobs in Austin, TX are:

What cities near Austin, TX are hiring for Asic Engineer jobs?

Cities near Austin, TX with the most Asic Engineer job openings:

Infographic showing various Asic Engineer job openings in Austin, TX as of August 2026, with employment types broken down into 91% Full Time, 5% Part Time, and 4% Contract. Highlights an 88% Physical, 4% Hybrid, and 8% Remote job distribution, with an average salary of $156,853 per year, or $75.4 per hour.

ASIC/SOC DFT Engineer (Silicon Engineering)

SpaceX

Austin, TX • On-site

$164K/yr

Other

Posted 27 days ago


SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 150 frontline employees who took The Breakroom Quiz

16th of 72 rated aerospace companies


Job description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
ASIC/SOC DFT ENGINEER (SILICON ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
RESPONSIBILITIES:
  • Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools
  • Integration and verification of Design for Test (DFT) fabrics and IP within Subsystems
  • Running and evaluating scan insertion through synthesis tools and refining scan insertion recipe for maximum coverage
  • Run ATPG(Automatic Test Pattern Generation) analysis to ensure quality scan chain construction and meeting basic coverage goals
  • Run and debug non-timing and SDF annotated gate level simulations
  • Creating ATPG content for use in post-silicon testing and validating that content through gate level simulation
  • Collaborate with circuit physical design team, ATPG team and manufacturing team to facilitate high quality scan coverage in silicon

BASIC QUALIFICATIONS:
  • Bachelor's degree in electrical engineering, computer engineering or computer science
  • 1+ years of professional experience working with ASICs
  • Experience in scan insertion or DFT setup

PREFERRED SKILLS AND EXPERIENCE:
  • Understanding of ASIC design flow, methodologies, physical design, and verification
  • Experience with high reliability design and implementations
  • Good scripting skills (csh/bash, Perl, Python etc.)
  • Familiar with implementation or integration of design blocks using Verilog/SystemVerilog
  • Familiar with UPF (unified power format), formal verification, and DRC rule checking experience
  • Ability to work in a dynamic environment with changing needs and requirements
  • Team-player, can-do attitude, and ability to work well in a group environment while still contributing on an individual basis
  • Enjoys being challenged and learning new skills

ADDITIONAL REQUIREMENTS:
  • Must be willing to work extended hours and weekends as needed

ITAR REQUIREMENTS:
    Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to

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About SpaceX

Sourced by ZipRecruiter

Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US