Tucson, AZ · On-site
$110 - $140/hr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ...
Tucson, AZ · On-site
$110 - $140/hr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Manage digital product development/media libraries * Document and maintain guidelines and standards ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Manage digital product development/media libraries * Document and maintain guidelines and standards ...
Support hardware and software development teams in bring-up and test of products. * Provide subject ... Experience in FPGA- or ASIC-based image processing algorithms * Ability to work under pressure and ...
Support hardware and software development teams in bring-up and test of products. * Provide subject ... Experience in FPGA- or ASIC-based image processing algorithms * Ability to work under pressure and ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Manage digital product development/media libraries * Document and maintain guidelines and standards ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Manage digital product development/media libraries * Document and maintain guidelines and standards ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Manage digital product development/media libraries Document and maintain guidelines and standards ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Manage digital product development/media libraries Document and maintain guidelines and standards ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Manage digital product development/media libraries Document and maintain guidelines and standards ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Manage digital product development/media libraries Document and maintain guidelines and standards ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Manage digital product development/media libraries Document and maintain guidelines and standards ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Manage digital product development/media libraries Document and maintain guidelines and standards ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
... ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems ... Maintain, control, and administer of the Digital Products Development Library (DDL) (formerly known ...
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... Experience with integration and debug of FPGA/ASIC devices * Radar processing techniques * Image ...
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... Experience with integration and debug of FPGA/ASIC devices * Radar processing techniques * Image ...
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
Tucson, AZ · On-site
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
Tucson, AZ · On-site
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... Experience with integration and debug of FPGA/ASIC devices * Radar processing techniques * Image ...
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... Experience with integration and debug of FPGA/ASIC devices * Radar processing techniques * Image ...
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
Tucson, AZ · On-site
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... Experience with integration and debug of FPGA/ASIC devices * Radar processing techniques * Image ...
Tucson, AZ · On-site
$116K - $160K/yr
... development, we offer capabilities and opportunity no one else can. Together, we push the ... Experience with integration and debug of FPGA/ASIC devices * Radar processing techniques * Image ...
$46.3K - $55.3K
3% of jobs
$55.3K - $64.3K
4% of jobs
$64.3K - $73.3K
16% of jobs
$74.1K is the 25th percentile. Wages below this are outliers.
$73.3K - $82.3K
19% of jobs
The median wage is $85.2K / yr.
$82.3K - $91.2K
24% of jobs
$97.4K is the 75th percentile. Wages above this are outliers.
$91.2K - $100.2K
13% of jobs
$100.2K - $109.2K
6% of jobs
$109.2K - $118.2K
5% of jobs
$118.2K - $127.2K
3% of jobs
$127.2K - $136.1K
5% of jobs
$136.1K - $145.1K
1% of jobs
$46.3K
$90.9K
$145.1K
| Aspect | Asic Development Engineer | FPGA Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of ASIC design tools | Bachelor's or Master's in Electrical Engineering, Digital Design; familiarity with FPGA development tools |
| Work Environment | Designing and verifying custom silicon chips in semiconductor labs or R&D centers | Developing and testing FPGA-based solutions in hardware labs or embedded systems environments |
| Industry Usage | Used in semiconductor companies, integrated circuit design firms, and tech giants | Common in telecommunications, aerospace, and embedded systems industries |
While both roles involve digital hardware design, Asic Development Engineers focus on creating custom chips for high-performance applications, whereas FPGA Design Engineers work on programmable hardware solutions. Both require strong digital design skills and familiarity with hardware description languages, but their end products and development environments differ.
For Asic Development Engineer jobs in Tucson, AZ, the most frequently searched job titles are:
The top searched job categories for Asic Development Engineer jobs in Tucson, AZ are:
$110 - $140/hr
Other
Posted 4 days ago
Date Posted: 2026-07-27 Country: United States of America Location: US-AZ-TUCSON-805 ~ 1151 E Hermans Rd ~ BLDG 805 Position Role Type: Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: Active and transferable U.S. government issued security clearance is required prior to start date. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance Security Clearance Type: DoD Clearance: Secret Security Clearance Status: Active and existing security clearance required on day 1
At RTX, the world's largest aerospace and defense company, 185,000 great minds are united by purpose and inspired to make a difference solving the world’s most complex problems. With our three market leading businesses, world-class operations and investments in research and development, we offer capabilities and opportunity no one else can. Together, we push the boundaries of known science and find new ways to connect and protect our world. Raytheon brings the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today’s mission and stay ahead of tomorrow’s threat. We deliver solutions that help our nation and allies defend freedom and deter aggression, creating a safer, more secure world. Join us and help shape the future of aerospace and defense. At Raytheon, the foundation of everything we do is rooted in our values and a higher calling - to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today’s mission and stay ahead of tomorrow’s threat. Our team solves tough, meaningful problems that create a safer, more secure world.
The Digital Products Configuration Management (DPCM), formerly known as Software Configuration Management (SWCM), department, is hiring a Digital Product Configuration Management Engineer II. The DPCM department provides innovative solutions through automation, continuous improvement, and a skilled workforce providing support for all digital products. The term 'Digital Product' (DP) refers to, but is not limited to, the following software types and their associated data and documentation: embedded (tactical) software, applications, Built-in Test (BIT) software, reprogramming tools, simulation software, test equipment, configurable logic, Application-Specific Integrated Circuit (ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems Engineering (MBSE) system models or related artifacts, Free Open Source Software (FOSS), and Commercial Off-The-Shelf (COTS) software.
Note This position will be filled onsite at the RTX Facility Tucson, AZ.
What You Will Do
