ZipRecruiter

Log In

1

Asic Design Memory Controller Jobs (NOW HIRING)

Netpreme

The work involves learning advanced LLM in modern data centers and applications to design memory ... Minimum of 5+ years of ASIC/SOC digital design experience * Excellent leadership, communication ...

Micron

Principal Engineer, ASIC Design

San Jose, CA

$198K - $336K/yr

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... We are building the next generation of solidstate drive controllers at Micron, where cuttingedge ...

Qualcomm

Next Generation, High-Speed, Memory and Cache Controller and Advanced Memory NoCs based Subsystem Design Team is looking for a Senior ASIC Design Engineers for the next generation high speed HBM ...

Apple

ASIC Design Engineer

Santa Clara, CA

$150K - $277K/yr

Description The ideal candidate will have experience in ASIC design with: - Architecture research ... memory subsystem, including dram controller, PHY architecture and design, DFI interface and dram ...

Apple

ASIC Design Engineer

Santa Clara, CA

$184K - $324K/yr

Description The ideal candidate will have experience in ASIC design with: - Architecture research ... memory subsystem, including dram controller, PHY architecture and design, DFI interface and dram ...

Apple

ASIC Design Engineer

Santa Clara, CA

$129K - $194K/yr

Description The ideal candidate will have experience in ASIC design with: - Architecture research ... memory subsystem, including dram controller, PHY architecture and design, DFI interface and dram ...

Apple

ASIC Design Engineer

Santa Clara, CA

$129K - $194K/yr

Description The ideal candidate will have experience in ASIC design with: - Architecture research ... memory subsystem, including dram controller, PHY architecture and design, DFI interface and dram ...

Positron AI

ASIC Design Engineer

Austin, TX · On-site

$225K - $350K/yr

Role Overview As a Senior ASIC Design Engineer, you will take a leadership role in defining ... Advanced Interface & Memory Integration: * Architect and integrate high-performance interconnects ...

previous page

Showing results 41-60

All JobsAsic Design Memory Controller Jobs

Asic Design Memory Controller information

See salary details

$94K

$150.2K

$202K

How much do asic design memory controller jobs pay per year?

As of Sep 15, 2026, the average yearly pay for asic design memory controller in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What is an ASIC Design Memory Controller?

An ASIC (Application-Specific Integrated Circuit) Design Memory Controller is a specialized hardware component designed to manage the communication between a processor and memory devices within an integrated circuit. Its main function is to coordinate data transfers, handle memory requests, and ensure data integrity and optimal performance. ASIC memory controllers are tailored for specific applications, such as networking, automotive, or consumer electronics, to meet unique speed, power, and efficiency requirements. They play a critical role in determining the overall system performance and reliability.

What are the key skills and qualifications needed to thrive as an ASIC Design Memory Controller engineer?

To thrive as an ASIC Design Memory Controller Engineer, you need a solid background in digital design, computer architecture, and memory subsystems, typically with a degree in electrical engineering or a related field. Proficiency with hardware description languages (such as Verilog or VHDL), simulation tools (like ModelSim or Synopsys), and experience with ASIC design flows are essential. Strong analytical thinking, problem-solving ability, and effective teamwork set top performers apart in this role. These skills are crucial for delivering reliable, high-performance memory controller designs that meet project specifications and industry standards.

What are some common challenges faced by ASIC Design Memory Controller engineers when integrating memory subsystems into larger chip architectures?

ASIC Design Memory Controller engineers often encounter challenges such as ensuring compatibility between different memory technologies (like DDR, LPDDR, or HBM) and the overall chip architecture. Timing closure, signal integrity, and meeting power/performance trade-offs are critical aspects that require close collaboration with verification, physical design, and firmware teams. Additionally, translating high-level system requirements into efficient RTL implementation while keeping up with evolving memory standards can be demanding. Proactively communicating with cross-functional teams and staying updated on industry trends are key strategies to overcome these challenges.

What is the difference between Asic Design Memory Controller vs FPGA Design Engineer?

AspectAsic Design Memory ControllerFPGA Design Engineer
Primary FocusDesigning memory controllers for ASIC chipsDesigning FPGA-based digital systems and logic
Required SkillsHardware description languages, memory architecture, verificationHDL, FPGA tools, digital design, prototyping
Work EnvironmentASIC development labs, semiconductor companiesElectronics labs, FPGA manufacturing firms
Industry UsageHigh-volume chip production, integrated circuitsPrototyping, custom hardware solutions

While both roles involve digital hardware design, an Asic Design Memory Controller specializes in creating memory interfaces for ASIC chips, focusing on high-performance, low-latency memory systems. An FPGA Design Engineer works on developing flexible, reconfigurable digital systems using FPGA technology. The roles share skills in HDL and digital design but differ in application and environment.

What are popular job titles related to Asic Design Memory Controller jobs?

For Asic Design Memory Controller jobs, the most frequently searched job titles are:

Distinguished Technologist, ASIC Design Architect

Sunnyvale, CA • On-site

Hewlett Packard Enterprise Development LP
IT Services • 10K+ employees
Learn more about Hewlett Packard Enterprise Development LPexternal

Full-time

Re-posted yesterday

Hewlett Packard Enterprise rating

8.8

Company rating: 8.8 out of 10

Based on 28 frontline employees who took The Breakroom Quiz

Job description

Distinguished Technologist, ASIC Design ArchitectThis role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.Our culture thrives onfinding new and better ways to accelerate what's next.We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs.We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you.Open up opportunities with HPE.

Job Description:

Distinguished Technologist, ASIC Design Architect

We are seeking an experienced ASIC Design Architect to own the hardware architecture, microarchitecture, and successful delivery of complex ASICs from concept through tapeout and silicon bringup. The ideal candidate combines deep system and RTLexpertisewith both handson technical experienceandcrossfunctional leadership. This role will define requirements, partition function into silicon blocks, lead microarchitecture and implementation strategy, and drive tradeoffs for performance, power,areaand schedule.

Key responsibilities

  • Define system and chip-level architecture based on product requirements (throughput, latency, features, power, area, cost).

  • Translate system/network/software requirements into microarchitecture, block partitioning, interfaces, and verification strategy.

  • Architect high-performancedatapaths, control planes, memory subsystems, and I/O (SerDes/PCIe/Ethernet/DDR/HBM) to meet PPA targets.

  • Mentor and grow engineering teams; promote architecture best practices and cross-discipline communication.

  • Balance technical decisions with schedule,riskand business priorities; present tradeoffs and roadmaps to stakeholders.

Must-have qualifications

  • Bachelor's or master'sdegree in electrical engineering, ComputerEngineeringor related field

  • 15+ years of ASIC design experience with progressive ownership of architecture/microarchitecture; proven record of tapeout(s).

  • Strongdatapathand system architecture skills: packet pipelines or equivalenthigh-throughputstreamingarchitectures, buffering,arbitrationand QoS/scheduling.

  • Experience integrating high-speed SerDes/PHY, MAC/PCS, and external memory controllers (DDR/HBM) and familiarity with signal integrity/clocking issues.

  • Excellent cross-functional communication skills; ability to drive tradeoffs with product management, firmware, verification,PDand foundry teams.

Nice-to-have

  • Prior experience indatacenterswitching/routing ASICs

  • Patents or publications in ASIC architecture or networking silicon.

Behavioral & leadership expectations

  • Able to set vision and translate it into deliverable milestones and measurable success criteria.

  • Strong collaborator: leads crossfunctional teams, negotiates priorities, and escalates risks early.

  • Mentorsengineers,conductsarchitecture and design reviews, and codifies architecture patterns and best practices.

  • Results-oriented:deliversunderschedulepressure, balances technical excellence with pragmatic tradeoffs.

What We Can Offer You:

Health & Wellbeing

We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

Personal & Professional Development

We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have - whether you want to become a knowledge expert in your field or apply your skills to another division.

Unconditional Inclusion

We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Let's Stay Connected:

Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE.

#unitedstates#executive, #networking

Job:

Engineering

Job Level:

TCP_07The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level.
- United States of America: Annual Salary USD 183,000 - 365,000 in Massachusetts // 183,000 - 389,500 in California
The listed salary range reflects base salary. Variable incentives may also be offered.

Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity.

Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.

HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.

Recruitment Fraud Alert

We have become aware of an increase in fraudulent recruitment activities in which individuals impersonate our company or authorized recruitment agencies to offer fake employment opportunities. These scams may occur through false websites, emails, social media, or chat-based applications and often aim to obtain personal information or money. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We also never request personal information such as back account details, Social Security numbers, or national IDs via social media or chat applications.

All legitimate job opportunities will come through official company channels, and candidates are responsible for verifying the credentials of any third party claiming to represent the company. Any reliance on fraudulent communication is at the individual's own risk, and HPE disclaims legal liability for any resulting damages. If you suspect recruitment fraud, do not share personal information or make any payments and report the incident to your local authorities immediately.

What Hewlett Packard Enterprise employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

Apply