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Asic Backend Physical Design Engineer Jobs (NOW HIRING)

Infotech Sourcing

Design Engineer V

Sunnyvale, CA · On-site

... ASIC Power engineer, or CAD Engineer/Physical Design engineer Experience with power estimation tools and synthesis, some physical design Knowledge of power trade-offs in design and back end ...

Infotech Sourcing

Design Engineer V

Sunnyvale, CA · Hybrid

... ASIC Power engineer, or CAD Engineer/Physical Design engineer Experience with power estimation tools and synthesis, some physical design Knowledge of power trade-offs in design and back end ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ... Collaborate closely with the back-end physical design team on floor planning, timing closure, power ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ... Collaborate closely with the back-end physical design team on floor planning, timing closure, power ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA

$156K - $160K/yr

Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ... Collaborate closely with the back-end physical design team on floor planning, timing closure, power ...

OmniVision Technologies

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ... Collaborate closely with the back-end physical design team on floor planning, timing closure, power ...

Etched

Physical Design Engineer

Cupertino, CA · On-site

$2.0K/mo

Running Physical Design flows to close blocks, support ASIC infrastructure, automate Physical ... Experience with back-end design and timing closure on 3nm-7nm * Experience with UPF-based low power ...

Etched

Physical Design Engineer

Cupertino, CA · On-site

$2.0K/mo

Running Physical Design flows to close blocks, support ASIC infrastructure, automate Physical ... Experience with back-end design and timing closure on 3nm-7nm * Experience with UPF-based low power ...

search-tactics

Physical Design Engineer

San Jose, CA · On-site

$70 - $80/hr

Physical Design Engineer Location: San Jose, CA Hybrid Duration: 12 Months VISA: H-1, GC, USC is ... Key Responsibilities Execute RTL synthesis for complex ASIC and SoC designs using Cadence Genus.

K2 Space

Senior ASIC Physical Design Engineer

Seattle, WA · On-site

$170K - $250K/yr

The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...

K2 Space

Senior ASIC Physical Design Engineer

OR · On-site +1

$170K - $250K/yr

The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...

Yoh,-A-Day-

Principal ASIC Design Engineer

Santa Clara, CA · On-site

$250K - $265K/yr

Principal ASIC Design Engineer (BH-400122) Location Santa Clara, United States Sector Engineering ... Work with Physical Design and DFT teams on synthesis, timing closure, area optimization, clocking ...

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Asic Backend Physical Design Engineer information

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$60.5K

$147.7K

$199K

How much do asic backend physical design engineer jobs pay per year?

As of Sep 13, 2026, the average yearly pay for asic backend physical design engineer in the United States is $147,662.00, according to ZipRecruiter salary data. Most workers in this role earn between $124,000.00 and $172,000.00 per year, depending on experience, location, and employer.

What are popular job titles related to Asic Backend Physical Design Engineer jobs?

For Asic Backend Physical Design Engineer jobs, the most frequently searched job titles are:

Infographic showing various Asic Backend Physical Design Engineer job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 76% Full Time, 18% Part Time, 1% Temporary, 3% Contract, and 1% Nights. Highlights an 98% Physical, 1% Hybrid, and 1% Remote job distribution, with an average salary of $147,662 per year, or $71 per hour.

Principal Compute Pathfinding ASIC Design

Boise, ID • On-site

Micron Technology, Inc
Semiconductor and Electronic Component Manufacturing • 10K+ employees
Learn more about Micron Technology, Incexternal

Other

Medical, Dental, Vision, PTO

Re-posted 19 days ago

Micron Technology rating

8.6

Company rating: 8.6 out of 10

Based on 43 frontline employees who took The Breakroom Quiz

Job description

Req ID: JR94945 Principal Compute Pathfinding ASIC Design

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

The Compute Strategy & Pathfinding group focuses on compute architectures and algorithms that define future memory and compute capabilities 3–5 years ahead of product integration. The team works closely with internal engineering groups, external partners, and customers to architect, evaluate, simulate, and design advanced ASIC solutions that shape Micron’s long‑term technology roadmap.

Responsibilities
  • Define and evolve ASIC and system architectures, including logic partitioning, module interfaces, and design tradeoffs across performance, power, area, and scalability.
  • Write detailed block‑level and architectural specifications to guide RTL design, verification, and system simulation activities.
  • Oversee logic design and synthesis activities, ensuring alignment with architectural intent and project requirements.
  • Contribute to backend synthesis and physical design flows, evaluating the impacts of placement, routing, timing, and power on architectural decisions.
  • Perform system‑level modeling, validate proof‑of‑concept designs, and analyze new architectural capabilities to assess feasibility and value.
  • Drive evaluation of complete ASIC flows from high‑level design through synthesis, place‑and‑route, timing closure, and power optimization.
  • Collaborate with multi‑functional teams—including build, verification, CAD, modeling, product engineering, and external vendors to ensure successful implementation readiness.
  • Support the transition of new architectures into product development, contributing to long‑term roadmap planning and technology pathfinding.
Minimum Qualifications
  • Master’s degree in Electrical or Computer Engineering, or a Bachelor’s degree (or equivalent experience) with 12+ years of relevant ASIC architecture and build experience.
  • Extensive experience with Verilog/SystemVerilog for architecture exploration, logic design, and RTL definition.
  • Strong background in computer architecture, data processing, and system‑level design concepts.
  • Experience across ASIC design flows, including logic design, synthesis, and interaction with physical design teams.
  • Strong analytical, problem‑solving, and communication skills, with the ability to work both independently and collaboratively.
Preferred Qualifications
  • Experience with advanced ASIC design tools and methodologies, including synthesis, static timing analysis, and power optimization.
  • Solid understanding of backend physical design flows and their impact on architectural decisions.
  • Familiarity with high‑level synthesis (HLS), system modeling, or architectural exploration frameworks.
Job Profile(s): ASIC Engineer 5

Relocation Level: TBD

Benefits

Micron offers a range of benefits including medical, dental, and vision plans available in all locations. Benefit programs assist with income protection during illness or injury, paid family leave, and paid time‑off. Detailed information is available in the Micron Benefits Guide.

Equal Opportunity Employment

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

To learn about your right to work, please consult applicable laws.

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