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Amd Chip Design Engineer Jobs (NOW HIRING)

ServerLogic

Senior ASIC Design Engineer

Beaverton, OR · On-site

Sr/ ASIC Design Engineer (5+ Years of Experience) DESCRIPTION OF POSITION/DUTIES - * Architect a ... Collaborate with other team members to integrate the block with the full chip * Use Verilog to ...

Agentrys

Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...

Advanced Micro Devices

At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and ... Top-level SOC or chip-level integration ownership on a mixed-signal device * Integration and debug ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...

NVIDIA Gruppe

Senior SOC Design Engineer

Santa Clara, CA · On-site

$168K - $264K/yr

As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ... Spot inefficiencies in the front‑end chip implementation process and propose actionable ...

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Amd Chip Design Engineer information

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$88.2K

$158.5K

How much do amd chip design engineer jobs pay per year?

As of Sep 9, 2026, the average yearly pay for amd chip design engineer in the United States is $88,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,000.00 and $98,500.00 per year, depending on experience, location, and employer.

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Infographic showing various Amd Chip Design Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 89% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $88,150 per year, or $42.4 per hour.

Senior ASIC Design Engineer

Beaverton, OR • On-site

ServerLogic
IT Services • 11 - 50 employees
Learn more about ServerLogicexternal

Full-time

Re-posted 13 days ago

Job description

Sr/ ASIC Design Engineer
(5+ Years of Experience)
DESCRIPTION OF POSITION/DUTIES -
  1. Architect a block of an ASIC and write a microarchitecture specification (MAS) for the block
  2. Collaborate with other team members to integrate the block with the full chip
  3. Use Verilog to design and System Verilog for block level verification
  4. Assist the Verification team in reviewing and debugging test cases
  5. Run LINT and CDC checks on the RTL code and fix accordingly.
  6. Assist with synthesis and FPGA emulation.

QUALIFICATIONS -
  1. BA/MS degree and 5+ years of relevant work experience.
  2. Demonstrate knowledge of Verilog for chip design and verification.
  3. Must understand the ASIC flow from MAS to silicon including RTL design, verification, synthesis, timing constraints, GLS, FPGA prototyping, and first silicon bring up and debug.
  4. Understanding of digital design and verification practices.
  5. Be able to take a specification, write RTL and simulation vectors to verify their RTL.
  6. One prior RTL design is a requirement.
  7. Experience with USB 2.0, USB 3.2, USB4, or PCIe is desired.

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