1

Ai Chip Design Rtl Jobs in Bridgeview, IL (NOW HIRING)

Recent advancements in underlying technology have finally made it possible for AI to impact ... Clonal Hematopoiesis (CHIP) Disambiguation: Design and integrate machine learning classifiers and ...

Data Engineer

Chicago, IL · On-site

$100K - $115K/yr

... chip brands and marquee properties. Our success is rooted in our people, our high character ... Contribute to relational data design-tables and relationships, primary/foreign keys, and ...

Data Engineer

Chicago, IL · On-site

$100K - $115K/yr

... chip brands and marquee properties. Our success is rooted in our people, our high character ... Contribute to relational data design--tables and relationships, primary/foreign keys, and ...

Product Manager (Payments)

Chicago, IL · On-site

$180K - $225K/yr

From our award-winning point-of-sale to AI-powered profit tools, everything we do helps operators ... Define how each payment media type is presented and accepted -chip, contactless, digital wallets, ...

Product Manager (Payments)

Chicago, IL · On-site

$180K - $225K/yr

From our award-winning point-of-sale to AI-powered profit tools, everything we do helps operators ... Define how each payment media type is presented and accepted --chip, contactless, digital wallets, ...

Chicago, IL. Building off AECOM's considerable expertise in infrastructure design and ... Leveraging AI tools to conduct baseline assessments and secondary research. * Conducting ...

Chicago, IL. Building off AECOM's considerable expertise in infrastructure design and ... Leveraging AI tools to conduct baseline assessments and secondary research. * Conducting ...

Chicago, IL. Building off AECOM's considerable expertise in infrastructure design and ... Leveraging AI tools to conduct baseline assessments and secondary research. * Conducting ...

Chicago, IL. Building off AECOM's considerable expertise in infrastructure design and ... Leveraging AI tools to conduct baseline assessments and secondary research. * Conducting ...

Chicago, IL. Building off AECOM's considerable expertise in infrastructure design and ... Leveraging AI tools to conduct baseline assessments and secondary research. * Conducting ...

Senior Consultant, Advisory

Chicago, IL · On-site

$100K - $150K/yr

Chicago, IL . Building off AECOM's considerable expertise in infrastructure design and ... Leveraging AI tools to conduct baseline assessments and secondary research. * Conducting ...

Chicago, IL . Building off AECOM's considerable expertise in infrastructure design and ... Leveraging AI tools to conduct baseline assessments and secondary research. * Conducting ...

Showing results 21-35

Ai Chip Design Rtl information

See Bridgeview, IL salary details

$82.2K

$142.3K

$186.4K

How much do ai chip design rtl jobs pay per year?

As of Aug 19, 2026, the average yearly pay for ai chip design rtl in Bridgeview, IL is $142,322.00, according to ZipRecruiter salary data. Most workers in this role earn between $138,900.00 and $138,900.00 per year, depending on experience, location, and employer.

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What cities near Bridgeview, IL are hiring for Ai Chip Design Rtl jobs?

Cities near Bridgeview, IL with the most Ai Chip Design Rtl job openings:

Bioinformatics Scientist

Tempus

Chicago, IL • On-site, Remote

Full-time

Posted 14 days ago


Job description

Passionate about precision medicine and advancing the healthcare industry?

Recent advancements in underlying technology have finally made it possible for AI to impact clinical care in a meaningful way. Tempus' proprietary platform connects an entire ecosystem of real-world evidence to deliver real-time, actionable insights to physicians, providing critical information about the right treatments for the right patients, at the right time.

We are seeking a highly motivated and capable Bioinformatics Scientist to join our Liquid Biopsy Science team. This role will focus directly on assay and algorithmic development, optimization, and analytical validation of our next-generation Liquid Biopsy assays. The ideal candidate will possess deep technical and biological expertise to address key liquid biopsy challenges for various applications including diagnostics, complete genomic profiling, therapeutic selection, and treatment response monitoring (TRM).

Core Duties and Responsibilities

  • High-Sensitivity Biomarker Detection: Develop, tune, and optimize novel assays, algorithms, machine learning and statistical models to analyze next-generation sequencing (NGS) and multimodal data to detect oncology related biomarkers (SNV/indel/CNV/rearrangements, MSI, bTMB) from cell free DNA.

  • Tumor Fraction Estimation & Modeling: Develop and refine machine learning models for cell-free circulating tumor DNA fraction estimation and tracking, enabling robust evaluation for longitudinal treatment response monitoring (TRM).

  • Noise Suppression & Error Correction: Improve advanced molecular barcoding filtering strategies to distinguish true low-frequency oncology-related biomarkers from background sequencing artifacts.

  • Clonal Hematopoiesis (CHIP) Disambiguation: Design and integrate machine learning classifiers and filtering logic to effectively differentiate non-tumor-derived Clonal Hematopoiesis variants from true tumor-derived variants, protecting patients from inappropriate therapy selections.

  • Performance Characterization & Regulatory Support: Design and execute experiments to evaluate the assay's analytical performance to support regulatory documentation for CAP/CLIA, New York State (NYS), FDA, and MolDx submissions.

  • Cross-Functional Collaboration: Work closely with wet-lab assay development scientists, medical directors, clinical scientists, biostatisticians, software engineers, and product managers to translate cutting-edge research into clinically actionable insights and production-scale pipelines.

Qualifications and Competencies

  • Must have completed a Ph.D. or a Masters with 3+ years of industry experience in Bioinformatics, Computational Biology, Cancer Biology, Genetics, Immunology, Molecular Biology, or Computer Science

  • In-depth knowledge of modern tools and pipelines for processing, aligning, and analyzing multimodal NGS data (including epigenetics, DNA, RNA).

  • Computational skills using Python and/or R, including experience with data science and biological computing libraries.

  • Expertise with cloud computing environments (AWS or GCP), container solutions (Docker), and common workflow management tools (Nextflow, Snakemake)

  • Proven scientific reputation as demonstrated by scientific publication and/or contribution to successful product development in industry

  • Strong background in constructing statistical models, creating predictive/prognostic algorithms, and applying machine learning techniques.

  • Demonstrated effective communication and presentation skills

  • Self-driven and works well in interdisciplinary teams

Pay Range: 100,000 - 140,000 USD

The expected salary range above is applicable if the role is performed from California and may vary for other locations (Colorado, Illinois, New York). Actual salary may vary based on qualifications and experience. Tempus offers a full range of benefits, which may include incentive compensation, restricted stock units, medical and other benefits depending on the position.

Additionally,for remote roles open to individuals in unincorporated Los Angeles - including remote roles-Tempus reasonably believes that criminal history may have a direct, adverse and negative relationship on the following job duties, potentially resulting in the withdrawal of the conditional offer of employment: engaging positively with customers and other employees; accessing confidential information, including intellectual property, trade secrets, and protected health information; and appropriately handling such information in accordance with legal and ethical standards. Qualified applicants with arrest or conviction records will be considered for employment in accordance with applicable law, including the Los Angeles County Fair Chance Ordinance for Employers and the California Fair Chance Act.

We are an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.