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Work From Home Rtl Design Engineer Jobs (NOW HIRING)

K2 Space

Senior ASIC Design Verification Engineer

$170K - $250K/yr

Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe ... Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation ...

Mastech Digital

GPU RTL/FW Engineer

San Jose, CA · Remote

$120/hr

... design, Verilog. - Good problem solving, root causing and debugging skills. Preferred Skills ... Must be able to work on a W2 basis (No C2C) Recruiter Name: Neha Naithani Recruiter Phone: 484-531 ...

Synopsys

ASIC Digital Design, Sr Manager

Sunnyvale, CA · On-site +1

$204K - $306K/yr

... RTL, reviewing detailed design implementations, and guiding engineers through complex debug and ... Planning and prioritizing design work, balancing handson technical involvement with team execution ...

QCi

$134K - $185K/yr

You will work directly with a diverse team of experts including quantum scientists, optical ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...

K2 Space

ASIC Design Verification Engineer

$130K - $200K/yr

Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe ... and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon ...

MatX

SOC Intergration Engineer

Mountain View, CA · Remote

$175K - $450K/yr

... SOC RTL design. * Partner with SubSystem owners within the Design team to facilitate block ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

Redolent, Inc.

US_West | Network Design Engineer_L3

$102K - $140K/yr

Marie.samayoa@capgemini.com Digital Design (RTL) Engineer Location: Santa Clara, CA Remote work ... designs from scratch Experience applying linting and other (QC) quality checking and basic ...

Next Step Systems

FPGA Engineer - Work From Home

Chicago, IL · On-site +1

$133K - $172K/yr

Chicago IL Jobs, FPGA Engineer, FPGA, VHDL, Verilog, Vivado, ModelSim, ISE Design, Secure IP, IP ... Work From Home, Financial, Trading, Chicago Recruiters, Information Technology Jobs, IT Jobs, ...

Synopsys

Senior Director Digital Design - 16907

Sunnyvale, CA · On-site +1

$229K - $343K/yr

... engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered ... You understand the difference between RTL that synthesizes cleanly and code that creates downstream ...

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Work From Home Rtl Design Engineer information

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$40.5K

$88.2K

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How much do work from home rtl design engineer jobs pay per year?

As of Jun 9, 2026, the average yearly pay for work from home rtl design engineer in the United States is $88,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,000.00 and $98,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in the Work From Home Rtl Design Engineer position, and why are they important?

A Work From Home RTL Design Engineer requires a thorough understanding of digital design, hardware description languages (such as Verilog or VHDL), and a relevant degree in electrical or computer engineering. Familiarity with industry-standard EDA tools like Synopsys, Cadence, or Mentor Graphics, and knowledge of design validation methodologies are commonly expected. Strong problem-solving abilities, effective communication skills, and self-motivation are crucial soft skills, particularly in a remote setting. These competencies ensure the engineer can deliver high-quality work, collaborate virtually with cross-functional teams, and meet project milestones in a distributed environment.

What is a Work From Home RTL Design Engineer job?

A Work From Home RTL (Register Transfer Level) Design Engineer is responsible for designing and implementing digital circuits using hardware description languages like Verilog or VHDL, all while working remotely. They develop RTL code for FPGA or ASIC designs, perform functional verification, and collaborate with hardware and software teams to ensure proper integration. This role requires strong knowledge of digital design principles, low-power design techniques, and simulation tools. Working remotely, engineers communicate via online tools, participate in virtual design reviews, and manage tasks independently while ensuring design quality and meeting project deadlines.

What are some typical challenges faced by Work From Home RTL Design Engineers, and how do companies support remote collaboration?

Remote RTL Design Engineers may face challenges such as limited access to on-site lab hardware, dependence on remote computing resources, and the need for clear communication across time zones. To address these, many companies provide secure VPN access, cloud-based EDA tool licenses, and regular virtual team meetings to ensure seamless project progress. You will often collaborate with verification, software, and hardware teams via video calls, shared documentation platforms, and version control systems. Structured onboarding, virtual mentorship programs, and flexible work hours are additional ways organizations support remote RTL designers. Adapting to these systems helps maintain productivity and fosters a collaborative team environment despite geographical distances.

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What cities are hiring for Work From Home Rtl Design Engineer jobs? Cities with the most Work From Home Rtl Design Engineer job openings:
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Work From Home Rtl Design Engineer jobs near you
Infographic showing various Work From Home Rtl Design Engineer job openings in the United States as of June 2026, with employment types broken down into 2% As Needed, 96% Full Time, 1% Temporary, and 1% Nights. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution, with an average salary of $88,150 per year, or $42.4 per hour.

ASIC Design Engineer (eInfochips)

Arrow Electronics, Inc.

Austin, TX • On-site, Remote

Full-time

Posted 13 days ago

Arrow Electronics rating

7.4

Company rating: 7.4 out of 10

Based on 17 frontline employees who took The Breakroom Quiz

Job description

Position:ASIC Design Engineer (eInfochips)
Job Description:

Role: Asic Design Engineer

Location: Mountain View CA (Remote)

Note: Seeking candidate with Fusion Compiler and Scripting experince.

What candidate will Be Doing:

  • Proficient in Verilog/System Verilog coding constructs.
  • Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting)
  • Experience with high speed PCIe designs and protocols.
  • Experience with Industry standard interface protocols such as AXI, APB, etc.
  • Experience with ARM Fabric IPs.
  • Experience with IPXACT.
  • Understanding of Computer Architecture fundamentals.
  • Ability to write scripts using Python, Tcl, Perl etc.
  • Experience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus.
  • Proficiency with UPF (Low power intent)
  • Proficiency in clock crossing techniques.
  • Knowledge of Static Timing Analysis and understanding of timing signoff fundamentals.

What we are looking for:

  • Good in understanding RTL Design and Digital concepts
  • Strong experience with EDA tools: Fusion Compiler, CDC
  • Scripting: Pearl, Python, TCL
  • At-least 5+ years of experience in Verilog Design
  • AMBA AXI bus along-with ARM or C based processor
  • Ensure customer satisfaction.
  • Reporting to customers on daily or weekly progress effectively

Work Arrangement Fully Onsite: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.

Location: Mountain View CA (Remote)

About eInfochips:

eInfochips, an Arrow company (Fortune#154), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow’s $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across

various industries & verticals.

Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries C verticals.

EEO Statement:

Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status.


Location:US-CA-Mountain View, California (Google)
Time Type:Full time
Job Category:Engineering ServicesEEO Statement:

Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)


All Arrow job postings are for existing job vacancies. We anticipate this requisition will be open for a minimum of five days, though it may be open for a longer period of time. We encourage your prompt application.

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