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Wafer Sort Test Engineer Jobs (NOW HIRING)

Nokia

Senior ATE Wafer Test Engineer

Sunnyvale, CA · On-site

Knowledge of automated test equipment (ATE) platforms, probe card development, software and ... Production logistics including ASIC wafer tracking and travelers * Supporting engineering releases ...

Altera

Product Development Engineer

San Jose, CA

$142K - $206K/yr

... wafer Sort and Class yield thru systematic test data analysis to isolate and mitigate defects and ... We are seeking motivated Product Development Engineer to help us in following areas but not limited ...

Nokia

Senior ATE Wafer Test Engineer

Sunnyvale, CA

... wafer level testing. * The candidate is expected to have hands on experience with NPI test ... Some experience with scripting and simple programming skills. * Critical thinking skills to debug ...

Altera Corporation

Product Development Engineer

San Jose, CA · On-site

$142K - $206K/yr

... wafer Sort and Class yield thru systematic test data analysis to isolate and mitigate defects and ... We are seeking motivated Product Development Engineer to help us in following areas but not limited ...

ISE LABS INC AND SUBSIDIARY

Test Floor Lead

Fremont, CA

$27 - $30/hr

... wafer sort probers, Thermo-stream, Silicon-Thermal, scanner equipment, and/or hand/bench test equipment according to customer specifications. * Works closely with Engineering regarding test flow and ...

Etched

Product Engineer, Silicon Validation

San Jose, CA · On-site

$2K/mo

Experience managing wafer sort and final test across multiple advanced process nodes * GPU, HPC, or ... We do not have boundaries between engineering and research, and we expect all of our technical ...

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Wafer Sort Test Engineer information

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$11K

$109.6K

$183.5K

How much do wafer sort test engineer jobs pay per year?

As of Jun 8, 2026, the average yearly pay for wafer sort test engineer in the United States is $109,565.00, according to ZipRecruiter salary data. Most workers in this role earn between $80,000.00 and $143,000.00 per year, depending on experience, location, and employer.

What are some typical challenges faced by Wafer Sort Test Engineers during the testing process?

Wafer Sort Test Engineers often encounter challenges related to yield loss analysis, equipment calibration, and diagnosing complex test failures. They must work closely with cross-functional teams such as process engineers, product engineers, and quality assurance to pinpoint root causes and implement corrective actions. Managing tight production schedules while ensuring test accuracy and data integrity is also a common aspect of the role. Staying up-to-date with evolving test technologies and methodologies helps engineers maintain efficiency and product quality.

What is the difference between Wafer Sort Test Engineer vs Test Engineer?

AspectWafer Sort Test EngineerTest Engineer
CredentialsTypically requires a degree in Electrical Engineering, Electronics, or related fieldSimilar educational background, often with certifications in testing or quality assurance
Work EnvironmentWorks primarily in semiconductor fabrication and testing labsWorks across various industries including electronics, manufacturing, and software testing
Industry UsageSpecific to semiconductor manufacturingBroader, spanning multiple sectors including electronics, automotive, and software

The main difference between a Wafer Sort Test Engineer and a Test Engineer lies in their focus area. Wafer Sort Test Engineers specialize in testing semiconductor wafers during manufacturing, while Test Engineers may work on testing complete products or systems across various industries. Both roles require similar technical skills and educational backgrounds but differ in their specific applications and work environments.

What are Wafer Sort Test Engineers?

Wafer Sort Test Engineers are professionals who develop, implement, and maintain testing processes for semiconductor wafers before they are cut into individual chips. They design test plans, analyze test results, and troubleshoot any issues found during the wafer sort process to ensure product quality and yield. Their work is critical in identifying defective dies early in the manufacturing process, which helps reduce costs and improve efficiency. Wafer Sort Test Engineers collaborate closely with design, process, and manufacturing teams to optimize test coverage and performance.

What are the key skills and qualifications needed to thrive as a Wafer Sort Test Engineer, and why are they important?

To thrive as a Wafer Sort Test Engineer, you need a strong background in electrical engineering, semiconductor device physics, and data analysis, often with a relevant degree. Familiarity with Automated Test Equipment (ATE), scripting languages (such as Python or Perl), and statistical analysis tools is typically required. Strong problem-solving skills, attention to detail, and effective teamwork are standout soft skills in this role. These competencies are crucial for ensuring accurate test results, optimizing processes, and supporting efficient semiconductor manufacturing.
Infographic showing various Wafer Sort Test Engineer job openings in the United States as of May 2026, with employment types broken down into 4% Locum Tenens, 14% Full Time, 1% Temporary, 62% Contract, and 19% Nights. Highlights an 99% Physical, and 1% Remote job distribution, with an average salary of $109,565 per year, or $52.7 per hour.
Senior ATE Wafer Test Engineer

Senior ATE Wafer Test Engineer

Nokia

Sunnyvale, CA • On-site

Full-time

Medical, Dental, Life, Retirement, PTO

Posted 24 days ago

Nokia rating

8.6

Company rating: 8.6 out of 10

Based on 5 frontline employees who took The Breakroom Quiz

4th of 76 rated telecommunications companies

Job description

Job Description
Description:
  • Experienced with scheduling and planning projects with external vendors and customers
  • Knowledge of automated test equipment (ATE) platforms, probe card development, software and hardware for wafer level testing.
  • The candidate is expected to have hands on experience with NPI test development, WS production yield analysis and yield drop out debug and disposition.
  • Familiar & comfortable with high-performance medium volume ASICs, production environment
  • Ability to write status reports, schedules and project plans and present results in general meeting formats.
  • Capable to contact vendors for project schedule, testing status, booking equipment, and test debugging
  • Collection, analysis, correlation and interpretation of data using statistical techniques and industry standard tools is required
  • Some experience with scripting and simple programming skills.
  • Critical thinking skills to debug and solve problems required
  • RF ATE testing experience is a plus

Responsibilities
Responsibilities:
  • Interface with external vendors for R&D and production testing
  • Ensure and correlate test SW and HW to written Test Plan
  • Production yield tracking, milestone tracking, problem assessment/disposition and invoice tracking
  • Wafer level ATE platform support of production, yield analysis, failure Paretos and yield improvement
  • Production logistics including ASIC wafer tracking and travelers
  • Supporting engineering releases through pilot runs and production
  • Develop, debug and release production methods and procedures to improve efficiency and yield compliant to TL/ISO manufacturing standards

Qualifications
Experience Required:
  • BS EE/physics with 5+ years industrial experience
  • Analog wafer level IC testing
  • Must have experience with probe card cleaning, maintenance and debug
  • Must have experience with ATE platform and wafer prober setup and operation
  • Must be able to assemble coherent and concise reports summarizing status and next steps
  • Must be able to effectively present findings to a cross-functional, collaborative team environment
  • Prefer experience with Galaxy or JMP data analysis tools.
  • Prefer Advantest 93K expertise including calibration, TL/ISO compliance and ESD compliance
  • Prefer expertise with Perl, VB, SQL and Perforce
  • Prefer UNIX/Linux experience

Skills Required:
  • Proficient interacting with design and application engineers
  • Strong debug and analytical skills
  • Self-motivated team player
  • Strong time and project management skills
  • Detail oriented with all aspects of technical work and vendor interactions

Excellent verbal and written communication skills
About Us
Advancing connectivity to secure a brighter world.
Nokia is a global leader in connectivity for the AI era. With expertise across fixed, mobile and transport networks, powered by the innovation of Nokia Bell Labs, we're advancing connectivity to secure a brighter world.
Learn more about life at Nokia.
Our recruitment process
We act inclusively and respect the uniqueness of people. Our employment decisions are made regardless of race, color, national or ethnic origin, religion, gender, sexual orientation, gender identity or expression, age, marital status, disability, protected veteran status or other characteristics protected by law. We are committed to a culture of inclusion built upon our core value of respect.
If you're interested in this role but don't meet every listed requirement, we still encourage you to apply. Unique backgrounds, perspectives, and experiences enrich our teams, and you may be just the right candidate for this or another opportunity.
The length of the recruitment process may vary depending on the specific role's requirements. We strive to ensure a smooth and inclusive experience for all candidates. Discover more about the recruitment process at Nokia.
About the Team
Some of our benefits in US:
  • Corporate Retirement Savings Plan
  • Health and dental benefits
  • Short-term disability, and long-term disability
  • Life insurance, and AD&D - Company paid 2x base pay
  • Optional or Supplemental life and AD&D insurance (Employee/Spouse/Child)
  • Paid time off for holidays and Vacation
  • Employee Stock Purchase Plan
  • Tuition Assistance Plan
  • Adoption assistance
  • Employee Assistance Program/Work Life Resource Program

The above benefits exclude students.
Disclaimer for US/Canada
Nokia Maintains broad annual base salary ranges for its roles in order to account for variations in knowledge, skills, experience and market conditions, and with consideration to internal peer equity. Check the salary ranges in the job info section for this role.
All North America job posts will post for a minimum of 7 calendar days and up to 180 days or until candidate/s identified.

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