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Verilog Rtl Design Engineer Jobs (NOW HIRING)

RTL Design Engineer

Beaverton, OR · On-site

$141K/yr

... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... Develop and optimize RTL code in Verilog/SystemVerilog for mixed-signal digital blocks and signal ...

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in ... Proficiency in Verilog/SystemVerilog and industry-standard RTL coding guidelines. * Familiarity ...

RTL Design Engineer

Austin, TX · On-site

$120K - $225K/yr

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in ... Proficiency in Verilog/SystemVerilog and industry-standard RTL coding guidelines. * Familiarity ...

RTL Design Engineer

Palo Alto, CA · On-site

$120K - $225K/yr

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in ... Proficiency in Verilog/SystemVerilog and industry-standard RTL coding guidelines. * Familiarity ...

CA · On-site

Microarchitect & RTL Design Engineer Location: Santa Clara, CA About the Role: We are seeking a ... Proficiency in Verilog, System Verilog * Familiarity with industry-standard EDA tools and ...

RTL Design Engineer

Watertown, MA · On-site

$147K/yr

You will work with a variety of flows fundamental to modern silicon engineering: modeling and ... Proven knowledge of RTL design, Verilog and SystemVerilog * Deep knowledge of front-end tools ...

RTL Design Engineer

Waltham, MA · On-site

$162K - $286K/yr

RTL Design Engineer At Apple, we work every day to craft products that enrich people's lives. If ... Proven knowledge of RTL design, Verilog and SystemVerilog * Deep knowledge of front-end tools ...

RTL Design Engineer

Waltham, MA · On-site

$114K - $199K/yr

Preferred Qualifications Proven knowledge of RTL design, Verilog and SystemVerilog Deep knowledge ... Electrical Engineering. Pay & Benefits At Apple, base pay is one part of our total compensation ...

... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... Develop and optimize RTL code in Verilog/SystemVerilog for mixed-signal digital blocks and signal ...

RTL Design Engineer

Irvine, CA · On-site

$120K - $210K/yr

... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... Develop and optimize RTL code in Verilog/SystemVerilog for mixed-signal digital blocks and signal ...

... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... Develop and optimize RTL code in Verilog/SystemVerilog for mixed-signal digital blocks and signal ...

... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... Develop and optimize RTL code in Verilog/SystemVerilog for mixed-signal digital blocks and signal ...

RTL Design Engineer

Waltham, MA · On-site

$162K - $286K/yr

You will work with a variety of flows fundamental to modern silicon engineering: modeling and ... Preferred Qualifications Proven knowledge of RTL design, Verilog and SystemVerilog Deep knowledge ...

... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... Develop and optimize RTL code in Verilog/SystemVerilog for mixed-signal digital blocks and signal ...

... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... Develop and optimize RTL code in Verilog/SystemVerilog for mixed-signal digital blocks and signal ...

... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... Bachelors of Science in Electrical Engineering. Front-end tools expertise (Verilog simulators ...

... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... Bachelors of Science in Electrical Engineering. Front-end tools expertise (Verilog simulators ...

... RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon ... Verilog simulators, linters, clock-domain crossing checkers)Synthesis, static timing analysis, and ...

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Verilog Rtl Design Engineer information

See salary details

$94K

$150.2K

$202K

How much do verilog rtl design engineer jobs pay per year?

As of Jun 4, 2026, the average yearly pay for verilog rtl design engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What is the difference between Verilog Rtl Design Engineer vs Digital Design Engineer?

AspectVerilog Rtl Design EngineerDigital Design Engineer
Primary FocusDesigning and implementing RTL code using Verilog for digital circuitsDesigning digital systems, including RTL, FPGA, and ASIC components
Skills & CertificationsVerilog proficiency, FPGA/ASIC knowledge, hardware description languagesDigital logic, HDL skills, FPGA/ASIC experience
Work EnvironmentSemiconductor companies, hardware design firms, R&D labsElectronics companies, chip design firms, embedded systems

While both roles involve digital hardware design, a Verilog Rtl Design Engineer specializes specifically in writing RTL code in Verilog, whereas a Digital Design Engineer may work across broader digital system design, including RTL, FPGA, and ASIC development. The Verilog Rtl Design Engineer role is more focused on HDL coding, while the Digital Design Engineer may encompass a wider range of digital design tasks.

RTL Design Engineer

RTL Design Engineer

Apple

Beaverton, OR • On-site

$141K/yr

Full-time

Posted 5 days ago


Apple rating

8.1

Company rating: 8.1 out of 10

Based on 661 frontline employees who took The Breakroom Quiz

6th of 30 rated technology retailers


Job description

At Apple, we work every day to craft products that enrich people's lives. If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon design team!
This role will build upon your solid foundation in digital logic circuits while introducing mixed-signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits, ensuring formal equivalence between custom designs and their abstract representations. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.
As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits with signal processing capabilities.
Description
In this role, you will be responsible for specifying and/or micro-architecting digital and signal processing blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others, including implementation of DSP algorithms. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, and validating signal processing performance.","responsibilities":"RTL Design & Implementation: Develop and optimize RTL code in Verilog/SystemVerilog for mixed-signal digital blocks and signal processing pipelines
DSP Algorithm Translation: Collaborate with algorithm engineers to translate DSP concepts (filtering, transforms, modulation, signal analysis) into efficient, high-performance RTL implementations
Design Verification: Write comprehensive assertions, unit-level testbenches, and participate in functional verification using industry-standard methodologies
Integration & Bring-up: Partner with cross-functional teams to integrate complex IPs, validate performance in silicon, and support lab characterization
Collaborative Problem-Solving: Work effectively with analog designers, algorithm engineers, verification specialists, and system architects across disciplinary boundaries
Preferred Qualifications
Front-end tools expertise (Verilog simulators, linters, clock-domain crossing checkers)
Synthesis, static timing analysis, and design-for-test (DFT)
SystemVerilog assertions, checkers, and advanced verification techniques
Scripting languages (Perl, Python)
Formal verification and low-power design methodologies
Hardware-software co-design and system-level optimization
Hands-on DSP experience: signal processing concepts, RTL algorithm implementation, hardware optimization techniques (pipelining, parallelization, resource sharing)
Intermediate to advanced GenAI proficiency: Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI capabilities/limitations in hardware design
Minimum Qualifications
BS and a minimum of 10 years relevant industry experience

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976