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Verification Engineer Jobs in Seattle, WA (NOW HIRING)

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Verification Engineer information

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$91.1K

$162.4K

$231.7K

How much do verification engineer jobs pay per year?

As of Aug 16, 2026, the average yearly pay for verification engineer in Seattle, WA is $162,396.00, according to ZipRecruiter salary data. Most workers in this role earn between $154,900.00 and $154,900.00 per year, depending on experience, location, and employer.

What is a verification engineer?

A verification engineer runs tests to ensure products function as expected before they become available to customers. Your job duties as a verification engineer include collaborating with the design team, creating a comprehensive testing process, testing products, providing feedback, and ensuring products are ready on time. The qualifications you need for a career as a verification engineer include a bachelor’s degree in an engineering field, at least two to five years of technical experience, and excellent teamwork skills. You may need Professional Engineer (PE) licensure for some employers.

What are the key skills and qualifications needed to thrive as a verification engineer?

To thrive as a Verification Engineer, you need a strong background in digital design, computer engineering, and verification methodologies, typically supported by a degree in electrical or computer engineering. Familiarity with hardware description languages like Verilog or VHDL, simulation tools (e.g., ModelSim, VCS), and verification frameworks such as UVM is essential. Strong analytical thinking, problem-solving abilities, and effective communication are standout soft skills in this role. These competencies ensure the reliable validation of complex hardware designs, reducing errors and improving product quality throughout the development process.

How does a verification engineer typically collaborate with design and development teams during a project?

Verification Engineers work closely with hardware and software design teams to ensure that products meet technical specifications and function as intended. They participate in regular design reviews, provide feedback on testability, and develop test plans aligned with design goals. Effective communication and collaboration are essential, as Verification Engineers often need to clarify requirements, report bugs, and suggest design improvements. This cross-functional teamwork helps identify issues early, leading to higher-quality products and more efficient project timelines.

What is the difference between Verification Engineer vs Test Engineer?

AspectVerification EngineerTest Engineer
Primary FocusEnsuring design correctness through simulation and formal methodsExecuting tests on hardware or software to validate functionality
Skills & CertificationsKnowledge of verification tools, scripting, HDL languagesTesting methodologies, scripting, hardware/software knowledge
Work EnvironmentDesign teams, simulation labs, verification environmentsTest labs, hardware setups, software testing environments
Industry UsageElectronics, semiconductor, ASIC/IP developmentElectronics, software, embedded systems

Verification Engineers focus on verifying design correctness through simulation and formal methods, while Test Engineers primarily execute tests on hardware or software to validate functionality. Both roles require technical skills and often overlap, but Verification Engineers are more involved in the design validation process, whereas Test Engineers focus on practical testing and validation in real-world environments.

What is a verification engineer?

A Verification Engineer is a professional responsible for ensuring that hardware or software systems meet their design specifications and work as intended. They develop test plans, create test environments, and use various simulation tools to catch bugs and errors before a product goes into production. Verification Engineers play a critical role in the quality assurance process, particularly in industries like semiconductor, electronics, and software development. Their work helps prevent costly design flaws and ensures reliable, high-quality products.

What are popular job titles related to Verification Engineer jobs in Seattle, WA?

For Verification Engineer jobs in Seattle, WA, the most frequently searched job titles are:

What job categories do people searching Verification Engineer jobs in Seattle, WA look for?

The top searched job categories for Verification Engineer jobs in Seattle, WA are:

What cities near Seattle, WA are hiring for Verification Engineer jobs?

Cities near Seattle, WA with the most Verification Engineer job openings:

Infographic showing various Verification Engineer job openings in Seattle, WA as of August 2026, with employment types broken down into 90% Full Time, 4% Part Time, and 6% Contract. Highlights an 88% Physical, 4% Hybrid, and 8% Remote job distribution, with an average salary of $162,396 per year, or $78.1 per hour.

Senior Quantum Analog Mixed-Signal Verification Engineer

Microsoft Corporation

Redmond, WA • On-site

$123K - $165K/yr

Other

Posted 3 days ago

New


Microsoft rating

8.5

Company rating: 8.5 out of 10

Based on 132 frontline employees who took The Breakroom Quiz

79th of 244 rated software companies


Job description

Overview
At Microsoft Quantum, we aim to empower science and scientists to solve the world's biggest problems by realizing advanced computing platforms at the intersection of high-performance computing, artificial intelligence, and quantum information technology. Our team is dedicated to developing the first scalable, fault-tolerant quantum computer and is leading progress in areas ranging from quantum hardware and error correction to comprehensive integration with Azure. Our full-stack strategy spans the physics of quantum devices through scalable readout and control infrastructures powered by cryo-electronics. We are entering a pivotal phase of accelerated growth in quantum computing, and this position presents a unique opportunity to contribute meaningfully to a transformative technology.
As a Senior Quantum Analog Mixed-Signal Verification Engineer in the Quantum 1st Party Hardware Application-Specific Integrated Circuit (ASIC) team, you will play a critical role in advancing the development of the team's quantum Analog Simulation infrastructure. Your responsibilities will include creating and defining system-wide Analog Mixed-Signal (AMS) models, simulation environments, and test plans for the team's System-on-a-Chip (SoC) and Intellectual Property (IP) blocks, and coordinating individuals, contingent staff, and external vendors to deliver a high-quality design.
You will work across SoC architecture, quantum hardware, analog design, and physical design teams throughout the program lifecycle to bring SoC and IP into production at the quality required for scalable quantum systems. If you thrive on complex challenges and foundational technologies that redefine what's possible, we invite you to help shape the future of quantum computing.
Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.
Responsibilities
  • Own and drive Analog Mixed-Signal (AMS) simulation of complex analog and digital blocks, including building analog block models, preparing and executing test plans, and supporting analog and AMS verification activities through tape-out.
  • Integrate analog and digital blocks across multiple SoCs to create a system-wide simulation environment for system-level algorithm modeling.
  • Coordinate with Analog Verification Engineers to run block-level and top-level analog and AMS simulations. Document results, present findings, drive design resolution, and provide status reports to track program metrics.
  • Build behavioral models for part or all of the analog components to support AMS verification, and provide models for full-chip digital verification.
  • Coordinate with internal team members and contractors, including screening and onboarding contractors as needed to complete deliverables.
  • Establish standardized AMS verification and modeling methodology with peers.
  • Other
    • Embody our culture and values.

Qualifications
Required/minimum qualifications
  • Doctorate in Physics, Engineering, or related field AND 1+ year(s) experience in industry or in a research and development environment, could include completion of a post doctoral research position
    • OR Master's Degree in Physics, Engineering, or related field AND 4+ years experience in industry or in a research and development environment
    • OR Bachelor's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment
    • OR equivalent experience

Other Requirements:
  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings:
    • Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
    • Citizenship & Citizenship Verification: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations (ITAR) or Export Administration Regulations (EAR), the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their U.S. permanent residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
  • Ability to leverage AI tools to drive innovation and efficiency (e.g., performance modeling and analysis, research gathering, day to day task automation).
  • Ability to work in an "AI-first" environment using modern AI tools to accelerate discovery through hardware development.

Preferred Qualifications:
  • 10+ years of experience in analog and Analog Mixed-Signal (AMS) verification, including delivery of verified analog and mixed-signal designs into mass production.
  • Hands-on experience with both analog simulation and digital simulation, and the ability to simulate them together for system-level AMS verification.
  • Proficient use of Electronic Design Automation (EDA) tools from Cadence, Mentor, and Synopsys, including AMS tools such as Synopsys XA and Cadence Spectre AMS.
  • Proficient in digital verification setup using Universal Verification Methodology (UVM) or Open Verification Methodology (OVM) testbenches.
  • Experience working with analog blocks such as Voltage-Controlled Oscillators (VCOs), charge pumps, interpolators, bandgap references, Operational Transconductance Amplifiers (OTAs), Phase-Locked Loops (PLLs), Analog-to-Digital and Digital-to-Analog Converters (ADCs/DACs), Low-Dropout Regulators (LDOs), Serializer/Deserializers (SerDes), and other foundational analog blocks.
  • Proficient in behavioral modeling for corners and variability of performance and process spread.
  • Experience with silicon characterization of AMS blocks and release to production.
  • Proficiency in MATLAB for complex modeling and visualization.
  • Proficiency in scripting languages such as Python and Perl, including automation of simulation and data analysis environments.

#Quantum #QuantumCareers #MDQCareers
Quantum Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
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This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

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About Microsoft

Sourced by ZipRecruiter

Our infrastructure is comprised of a large global portfolio of more than 100 datacenters and 1 million servers. Our foundation is built upon and managed by a team of subject matter experts working to support services for more than 1 billion customers and 20 million businesses in over 90 countries worldwide. With environmental sustainability and optimization at the forefront of our datacenter design and operations, we continue to grow and evolve as we meet the ever-changing business demands that hold Microsoft as a world-class cloud provider.

Industry

Computer and computer peripheral equipment and software wholesalers

Company size

10,000+ Employees

Headquarters location

Redmond, WA, US

Year founded

1975

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