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Uvm Jobs in Virginia (NOW HIRING)

Lynk

Senior FPGA_AIE Engineer

Chantilly, VA · On-site

$107K - $146K/yr

Experience with UVM or hardware in the loop testing methodologies. * Experience with RFICs and multi chip synchronization. * Experience with high-speed interfaces such as JESD204C and high speed ...

BAE Systems

Eng Sr Prin II - Elec

Chantilly, VA · On-site

$149K - $254K/yr

Experience with OVM/UVM Verification methodologies. * Experience developing specifications, cost, schedule, and resource requirements for digital/FPGA designs. * Familiarity with high-speed ...

BAE Systems

Eng Prin - Elec

Chantilly, VA · On-site

$118K - $200K/yr

Experience with OVM/UVM Verification methodologies. * Experience developing specifications, cost, schedule, and resource requirements for digital/FPGA designs. * Familiarity with high-speed ...

Trident Systems LLC

Senior FPGA Engineer

Fairfax, VA · On-site

$97K - $181K/yr

Experience using simulation verification libraries such as UVVM, UVM, OVM, etc. * Familiarity with lab test equipment such as logic analyzers, oscilloscopes, signal generators, spectrum analyzers ...

BAE Systems

Eng Sr Prin - Elec

Chantilly, VA · On-site

$132K - $226K/yr

Experience with OVM/UVM Verification methodologies. * Experience developing specifications, cost, schedule, and resource requirements for digital/FPGA designs. * Familiarity with high-speed ...

BAE Systems

Eng Sr Prin - Elec

Chantilly, VA · On-site

$132K - $226K/yr

Experience with OVM/UVM Verification methodologies. * Experience developing specifications, cost, schedule, and resource requirements for digital/FPGA designs. * Familiarity with high-speed ...

BAE Systems

Eng Prin - Elec

Chantilly, VA · On-site

$118K - $200K/yr

Experience with OVM/UVM Verification methodologies. * Experience developing specifications, cost, schedule, and resource requirements for digital/FPGA designs. * Familiarity with high-speed ...

BAE Systems

Eng Sr Prin II - Elec

Chantilly, VA · On-site

$149K - $254K/yr

Experience with OVM/UVM Verification methodologies. * Experience developing specifications, cost, schedule, and resource requirements for digital/FPGA designs. * Familiarity with high-speed ...

All JobsUvm JobsUvm Jobs in Virginia

Uvm information

See Virginia salary details

$66.9K

$123.7K

$167.6K

How much do uvm jobs pay per year?

As of Jul 27, 2026, the average yearly pay for uvm in Virginia is $123,654.00, according to ZipRecruiter salary data. Most workers in this role earn between $106,600.00 and $138,800.00 per year, depending on experience, location, and employer.

What is the difference between Uvm vs Network Technician?

AspectUvmNetwork Technician
Required CertificationsUVM certifications, technical trainingCompTIA Network+, Cisco CCNA
Work EnvironmentData centers, server rooms, IT departmentsOffice settings, client sites, data centers
Industry UsageIT, data management, cloud servicesNetworking, telecommunications, IT support

Uvm and Network Technicians both work in IT environments, often requiring similar certifications and working in data centers or network setups. While Uvm specialists focus on virtual machine management and cloud infrastructure, Network Technicians primarily handle network hardware, configurations, and troubleshooting. Both roles are essential in maintaining IT infrastructure but differ in their specific technical focus and daily tasks.

What are some common challenges faced by UVM (Universal Verification Methodology) engineers during verification projects?

UVM engineers often encounter challenges such as managing complex testbenches, ensuring comprehensive coverage, and debugging intricate design issues. Coordinating with design and RTL teams to clarify specifications and resolve inconsistencies can also be demanding. Additionally, maintaining reusable and scalable verification environments requires strong coding practices and continuous learning, especially as projects evolve in size and complexity. Collaborating effectively across cross-functional teams is essential to ensure timely project completion.

What are UVMs in the context of job titles?

UVM stands for Universal Verification Methodology, which is a standardized methodology used in the semiconductor industry for verifying integrated circuit designs. UVM engineers or verification engineers use this approach to develop reusable testbenches and improve the efficiency and accuracy of hardware verification. Their responsibilities typically include creating test environments, writing tests in SystemVerilog, and ensuring that chip designs work as intended before manufacturing.

What are the key skills and qualifications needed to thrive as a uvm (University of Vermont) employee, and why are they important?

To excel as a University of Vermont (UVM) employee, you generally need a relevant educational background and expertise specific to your department or position, such as teaching, research, or administration. Familiarity with academic software, campus management systems, and relevant certifications (e.g., teaching credentials or research compliance) is often required. Strong communication, collaboration, and adaptability are essential soft skills for engaging with students, colleagues, and the broader academic community. These skills and qualifications are vital for fostering an effective, innovative, and supportive university environment.
What are popular job titles related to Uvm jobs in Virginia? For Uvm jobs in Virginia, the most frequently searched job titles are:
What job categories do people searching Uvm jobs in Virginia look for? The top searched job categories for Uvm jobs in Virginia are:
Uvm jobs near you
Infographic showing various Uvm job openings in Virginia as of July 2026, with employment types broken down into 2% Internship, 74% Full Time, 5% Part Time, and 19% Contract. Highlights an 81% In-person, 4% Hybrid, and 15% Remote job distribution, with an average salary of $123,654 per year, or $59.4 per hour.
FPGA Verification Engineer with Security Clearance

FPGA Verification Engineer with Security Clearance

Legacy Consulting Services , LLC

Arlington, VA • On-site

$141K - $195K/yr

Other

Posted 26 days ago

Job description

Location: Arlington, VA (HQ2) or Jessup, MD Clearance: Active TS/SCI with polygraph required Citizenship: US Citizen required Scope of Work
Develop and execute verification strategies for FPGA-based systems supporting AWS infrastructure. The contractor will build UVM-based verification environments, develop testbenches, and drive coverage closure for 100G+ networking solutions on advanced FPGA platforms. Key Responsibilities
• Develop UVM/SystemVerilog verification environments and testbenches for FPGA designs
• Create and execute verification plans with functional coverage models and assertions
• Drive coverage closure to completion (functional, code, and assertion coverage)
• Debug RTL failures in simulation and on hardware targets
• Develop constrained-random and directed test sequences for protocol verification (e.g., AXI, Ethernet)
• Perform regression analysis and coverage gap identification
• Collaborate with design engineers on architecture reviews and interface specifications
• Support hardware bring-up and debug on FPGA targets Required Qualifications
• BS in Electrical Engineering or related field
• 5+ years FPGA/ASIC verification experience
• SystemVerilog required
• 5+ years with UVM-based verification (constrained-random, coverage-driven methodologies)
• Demonstrated experience driving coverage closure to completion
• Strong UVM testbench architecture skills (agents, sequences, scoreboards, coverage models)
• Proficiency in SystemVerilog assertions (SVA) and simulation tools (Synopsys VCS, Mentor Questa, or equivalent)
• Experience verifying high-speed networking or datapath designs
• Knowledge of standard bus protocols (AXI, AXI-Stream, Ethernet)
• Active TS/SCI with polygraph (US Citizen)

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