1

Testing Verification Engineer Jobs (NOW HIRING)

Design Verification Engineer

Plano, TX · On-site

$130K - $158K/yr

and other details - We are seeking an ASIC Design Verification Engineer whose role will be to ... Experience with test planning, testbench development, constrained-random testing, and coverage ...

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ... Perform simulation-based verification, debugging, and regression testing. * Collaborate with design ...

Their engineering culture emphasizes technical excellence, rigorous verification processes, and ... Perform unit testing using RTRT and proprietary C/C++ testing tools. * Execute automated test ...

Software Verification Engineer We are seeking a hands-on Software Verification Engineer with strong ... This role is heavily focused on white box testing, automated test development using Pytest, and ...

Showing results 21-40

Testing Verification Engineer information

See salary details

$80K

$142.6K

$203.5K

How much do testing verification engineer jobs pay per year?

As of Sep 10, 2026, the average yearly pay for testing verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What cities are hiring for Testing Verification Engineer jobs?

Cities with the most Testing Verification Engineer job openings:

What states have the most Testing Verification Engineer jobs?

States with the most job openings for Testing Verification Engineer jobs include:

What are popular job titles related to Testing Verification Engineer jobs?

For Testing Verification Engineer jobs, the most frequently searched job titles are:

Infographic showing various Testing Verification Engineer job openings in the United States as of July 2026, with employment types broken down into 96% Full Time, 1% Part Time, and 3% Contract. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.

Design Verification Engineer

Plano, TX • On-site

$130K - $158K/yr

Contractor

Re-posted 19 days ago


Job description

Job Description and other details –

We are seeking an ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape first-generation silicon. 

Qualifications 

B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.

3+ years of experience in ASIC/SoC verification.

Solid understanding of SystemVerilog, digital logic, and hardware verification flows.

Proficiency with a simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision) and coverage tool.

Experience with test planning, testbench development, constrained-random testing, and coverage analysis.

Familiarity with a scripting language (ex: Python, Perl, TCL) and revision control system (ex: Git). 

Responsibilities 

Develop and execute verification plans for block-level, subsystem-level, and full-chip environments.

Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models.

Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate.

Drive constrained-random and directed testing strategies to validate functionality, corner cases, and stress scenarios.

Run simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues.

Implement and maintain functional coverage, code coverage, assertion coverage, and ensure coverage closure for sign-off.

Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and fast debug iterations.

Participate in design reviews and microarchitecture discussions.