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Tapeout Design Engineer Jobs in Texas (NOW HIRING)

Apple

GPU Physical Design Engineer

Austin, TX · On-site

$134K - $138K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design ... design from RTL to tapeout. Description - Work closely with the FE team to understand chip ...

Apple

SoC Physical Design Engineer, STA/Timing

Austin, TX · On-site

$134K - $138K/yr

... tapeout) for a highly complex SOC using state of the art process technology. Description - Work ... Experience with large design STA and/or Timing Closure. Programming skills with Perl and TCL.

Apple

GPU Physical Design Engineer

Austin, TX

$134K - $138K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design ... design from RTL to tapeout. Description - Work closely with the FE team to understand chip ...

Qualcomm

Staff SOC Physical Design Engineer

Austin, TX · On-site

$161.18 - $210/hr

Provide schedules and support cross‑functional engineering effort to drive signoff closure for tapeout * Act as a strong contributor at design reviews and project meetings, communicating and ...

IC Enable

Analog Design Engineer

Richardson, TX · On-site +1

$182K/yr

Run pre-tapeout verification flows to confirm design meets performance, power, reliability, and timing requirements * Work closely with mask design engineers to deliver the physical design as well as ...

Apple

GPU Physical Design Engineer

Austin, TX · On-site

$134K - $138K/yr

... design from RTL to tapeout. Description - Work closely with the FE team to understand chip ... route engineers, set goals and breakthroughs, plan short and long-term work, understand ...

Apple

GPU Physical Design Engineer

Austin, TX · On-site

$134K - $138K/yr

... design from RTL to tapeout. Description - Work closely with the FE team to understand chip ... route engineers, set goals and breakthroughs, plan short and long-term work, understand ...

Apple Inc.

GPU Physical Design Engineer

Austin, TX · On-site

$180 - $240/hr

... tapeout. Description Work closely with the FE team to understand chip architecture and drive physical aspects early in design cycle. Drive outstanding PD construction and optimization recipes for ...

Tenstorrent

Physical Design Engineer

Austin, TX · On-site

$100K - $500K/yr

You'll own the complete implementation flow from synthesis to tapeout, working alongside world ... A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of ...

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Tapeout Design Engineer information

What is a tapeout design engineer?

Tapeout Design Engineers are professionals responsible for finalizing the layout and design of integrated circuits (ICs) before manufacturing. They ensure that all design specifications are met, and that the chip layout is error-free and ready for fabrication. Their work involves collaborating with design, verification, and foundry teams to deliver a manufacturable design, often using tools for physical verification, design rule checking, and layout-versus-schematic checks. This role is critical in the semiconductor industry, as any errors at tapeout can result in costly manufacturing delays. Tapeout Design Engineers play a key role in bringing new microchips from concept to production.

What are the key skills and qualifications needed to thrive as a tapeout design engineer?

To thrive as a Tapeout Design Engineer, you need a solid background in semiconductor physics, digital/analog circuit design, and a relevant engineering degree. Proficiency with EDA tools such as Cadence, Synopsys, and experience with physical verification, DRC/LVS checks, and scripting languages like Python or TCL are typically required. Strong attention to detail, problem-solving skills, and effective communication are valuable soft skills in this role. These skills and qualities are crucial for ensuring error-free silicon fabrication, efficient workflow, and successful collaboration across engineering teams.

What are some common challenges tapeout design engineers face during the tapeout process, and how can they be addressed?

Tapeout Design Engineers often encounter tight deadlines, last-minute design changes, and the need to coordinate between multiple teams such as layout, verification, and fabrication. Addressing these challenges typically involves proactive communication, thorough planning, and the use of automated verification tools to catch errors early. Effective collaboration and robust documentation help ensure that any issues are quickly identified and resolved, minimizing the risk of costly delays or rework in the fabrication stage.

What is the difference between Tapeout Design Engineer vs ASIC Design Engineer?

AspectTapeout Design EngineerASIC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or related field; knowledge of EDA toolsBachelor's or Master's in Electrical Engineering or related field; strong digital design skills
Work EnvironmentSemiconductor companies, chip design firms, EDA tool providersSemiconductor companies, integrated circuit design firms
Industry UsageFocuses on final chip layout and manufacturing readinessDesigns the digital architecture and logic of chips

While both roles require a background in electrical engineering and familiarity with EDA tools, a Tapeout Design Engineer specializes in preparing the final chip layout for manufacturing, ensuring design rules are met. An ASIC Design Engineer focuses on creating the digital logic and architecture of integrated circuits. The roles often collaborate but differ mainly in their stage of the design process and specific responsibilities.

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Tapeout Design Engineer jobs near you

GPU Physical Design Engineer

Apple

Austin, TX • On-site

$134K - $138K/yr

Full-time

Re-posted 2 days ago

Apple rating

8.1

Company rating: 8.1 out of 10

Based on 681 frontline employees who took The Breakroom Quiz

6th of 30 rated technology retailers

Job description

Do you love creating sophisticated solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient GPU! You’ll ensure Apple products and services can seamlessly handle the tasks that make them beloved by millions! Joining this group means crafting and building the technology that fuels Apple’s devices. Together, we enable our customers to do all the things they love with their devices. This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to tapeout.
Description
- Work closely with the FE team to understand chip architecture and drive physical aspects early in design cycle.
- Drive outstanding PD construction and optimization recipes for performance, power and Area (PPA).
- Work on pioneering designs in the latest technology nodes.
- Collaborate to drive methodologies and “best known methods” to streamline PD work, come up with guidelines and checklists, drive execution, and supervise progress.
- Drive the work among place and route engineers, set goals and breakthroughs, plan short and long-term work, understand dependencies between different domains like top, STA, block PnR.
- Lead and resolve design and flow issues related to physical design, identify potential solutions and drive execution.
Preferred Qualifications
Masters degree preferred.
We value ability in all aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place and Route and all aspects of timing, electrical and physical signoff.
Experience working with EDA tools and exposure to their APIs.
Use design knowledge and innovative physical construction and optimization flows to push performance, power, and Area (PPA) of GPU designs.
Knowledge of multi-voltage, power gated, and power retention concepts will be an advantage.
Practical knowledge with hierarchical design approach, top-down design, budgeting, timing, and physical convergence will be an asset.
Minimum Qualifications
Bachelors degree in Engineering or Computer Science required.
Experience or coursework in one or more of the following areas: physical design, synthesis, DFT or clocking.
Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI concepts.
Experience with scripting languages such as TCL, Python, Perl or shell scripting.

What Apple employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976

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