Job Title: Analog Design Engineer
Job Location: Santa Clara, CA (Onsite for 5 days a week)
Job Type: Long-term contract
Duration: 12 months
Skills : SOC, FPGA, ASIC, Controller, Processor
Minimum Qualifications:
- The ideal candidate should have a minimum of MS in Electrical Engineering with 8+ years of experience in high-speed serial links and deep knowledge of analog CMOS/BiCMOS designs in deep sub-micron process technologies.
- Hands-on circuit design experience of SerDes blocks like Equalizers, PLL, Phase-Interpolators, CDR, etc. for 28Gbps+ data rates
- Experience with design of inductors, transmission line, Trans-Impedance Amplifiers (TIA) and modulator drivers
- Experience with the design of precision analog circuits like ADC/DACs
- Experience with Mixed signal design/verification flows
- Experience with full-chip designs, ESDs and verification flows
- Excellent oral and written communication skills.