Westford, MA · On-site
$141K - $145K/yr
NVIDIA is looking for best-in-class Physical Design Engineers with expertise in Synthesis to join ... Analyze design bottlenecks and QoR regressions, collaborating with RTL, timing, architecture, and ...
Westford, MA · On-site
$141K - $145K/yr
NVIDIA is looking for best-in-class Physical Design Engineers with expertise in Synthesis to join ... Analyze design bottlenecks and QoR regressions, collaborating with RTL, timing, architecture, and ...
Westford, MA · On-site
$141K - $145K/yr
NVIDIA is looking for best-in-class Physical Design Engineers with expertise in Synthesis to join ... Analyze design bottlenecks and QoR regressions, collaborating with RTL, timing, architecture, and ...
Westford, MA · On-site
$141K - $145K/yr
NVIDIA is looking for best-in-class Physical Design Engineers with expertise in Synthesis to join ... Analyze design bottlenecks and QoR regressions, collaborating with RTL, timing, architecture, and ...
NVIDIA is looking for best-in-class Physical Design Engineers with expertise in Synthesis to join ... Analyze design bottlenecks and QoR regressions, collaborating with RTL, timing, architecture, and ...
NVIDIA is looking for best-in-class Physical Design Engineers with expertise in Synthesis to join ... Analyze design bottlenecks and QoR regressions, collaborating with RTL, timing, architecture, and ...
Boston, MA · On-site
$217K - $267K/yr
... STA signoff, review constraints, debug timing reports and implement ecos * Drive power analysis and ... Bachelor's in Electrical Engineering or Computer Engineering * 12+ years of industry experience ...
Boston, MA · On-site
$217K - $267K/yr
... STA signoff, review constraints, debug timing reports and implement ecos * Drive power analysis and ... Bachelor's in Electrical Engineering or Computer Engineering * 12+ years of industry experience ...
Marlborough, MA · On-site
$107K - $145K/yr
As a Senior Electrical Engineer - FPGA , you will play a key role on an Integrated Program Team ... Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing ...
Marlborough, MA · On-site
$107K - $145K/yr
As a Senior Electrical Engineer - FPGA , you will play a key role on an Integrated Program Team ... Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing ...
Marlborough, MA · Hybrid
$107K - $145K/yr
As a Senior Electrical Engineer - FPGA , you will play a key role on an Integrated Program Team ... Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing ...
Marlborough, MA · Hybrid
$107K - $145K/yr
As a Senior Electrical Engineer - FPGA , you will play a key role on an Integrated Program Team ... Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing ...
Boxborough, MA · On-site
$99K/yr
Responsible for circuit design, layout quality, electrical and timing analysis, and reliability ... Masters in Electrical/Electronics Engineering, with specialization in microelectronics or something ...
Boxborough, MA · On-site
$99K/yr
Responsible for circuit design, layout quality, electrical and timing analysis, and reliability ... Masters in Electrical/Electronics Engineering, with specialization in microelectronics or something ...
Waltham, MA · On-site
$146K - $151K/yr
... bump/RDL, STA, physical verification, EMIR, sign-off. - You will also collaborate to drive ... timing closure, and physical & electrical verification. Knowledge of PD construction & analysis ...
Waltham, MA · On-site
$146K - $151K/yr
... bump/RDL, STA, physical verification, EMIR, sign-off. - You will also collaborate to drive ... timing closure, and physical & electrical verification. Knowledge of PD construction & analysis ...
... and timing analysis * Reviewing schematics and PCB layouts to identify firmware impacts ... Mentoring and coaching engineers on embedded firmware architecture, debugging techniques, and best ...
... and timing analysis * Reviewing schematics and PCB layouts to identify firmware impacts ... Mentoring and coaching engineers on embedded firmware architecture, debugging techniques, and best ...
Fitchburg, MA · Hybrid
$150/day
First, to provide functional management and technical leadership to a team of 8-12 analysis engineers. Second, this role is expected to personally execute and technically own the most complex ...
Fitchburg, MA · Hybrid
$150/day
First, to provide functional management and technical leadership to a team of 8-12 analysis engineers. Second, this role is expected to personally execute and technically own the most complex ...
Fitchburg, MA · On-site
$128K - $199K/yr
First, to provide functional management and technical leadership to a team of 8-12 analysis engineers. Second, this role is expected to personally execute and technically own the most complex ...
Fitchburg, MA · On-site
$128K - $199K/yr
First, to provide functional management and technical leadership to a team of 8-12 analysis engineers. Second, this role is expected to personally execute and technically own the most complex ...
... and timing analysis * Reviewing schematics and PCB layouts to identify firmware impacts ... Mentoring and coaching engineers on embedded firmware architecture, debugging techniques, and best ...
Quick apply
... and timing analysis * Reviewing schematics and PCB layouts to identify firmware impacts ... Mentoring and coaching engineers on embedded firmware architecture, debugging techniques, and best ...
... and timing analysis * Reviewing schematics and PCB layouts to identify firmware impacts ... Mentoring and coaching engineers on embedded firmware architecture, debugging techniques, and best ...
... and timing analysis * Reviewing schematics and PCB layouts to identify firmware impacts ... Mentoring and coaching engineers on embedded firmware architecture, debugging techniques, and best ...
Fitchburg, MA · Hybrid
$128K - $199K/yr
First, to provide functional management and technical leadership to a team of 8-12 analysis engineers. Second, this role is expected to personally execute and technically own the most complex ...
Fitchburg, MA · Hybrid
$128K - $199K/yr
First, to provide functional management and technical leadership to a team of 8-12 analysis engineers. Second, this role is expected to personally execute and technically own the most complex ...
Fitchburg, MA · On-site
$150/day
First, to provide functional management and technical leadership to a team of 8-12 analysis engineers. Second, this role is expected to personally execute and technically own the most complex ...
Fitchburg, MA · On-site
$150/day
First, to provide functional management and technical leadership to a team of 8-12 analysis engineers. Second, this role is expected to personally execute and technically own the most complex ...
... integration, timing analysis, packaging, and multi-chip integrated packaging * Proficient in ... party developers * Broad-based exposure to ASIC design flows required for releasing a chip to ...
... integration, timing analysis, packaging, and multi-chip integrated packaging * Proficient in ... party developers * Broad-based exposure to ASIC design flows required for releasing a chip to ...
... integration, timing analysis, packaging, and multi-chip integrated packaging * Proficient in ... party developers * Broad-based exposure to ASIC design flows required for releasing a chip to ...
... integration, timing analysis, packaging, and multi-chip integrated packaging * Proficient in ... party developers * Broad-based exposure to ASIC design flows required for releasing a chip to ...
Waltham, MA · On-site
Use formal tools and static checkers to guarantee RTL quality. You will also support design ... Responsibilities will include driving functional and code coverage as well as timing closure for ...
Waltham, MA · On-site
Use formal tools and static checkers to guarantee RTL quality. You will also support design ... Responsibilities will include driving functional and code coverage as well as timing closure for ...
Wilmington, MA · On-site
$151K - $227K/yr
... design engineer for low power, high-speed SerDes IPs. You will be involved in the design ... Experience with timing analysis, power consumption, physical design and DFT concepts * Architect ...
Wilmington, MA · On-site
$151K - $227K/yr
... design engineer for low power, high-speed SerDes IPs. You will be involved in the design ... Experience with timing analysis, power consumption, physical design and DFT concepts * Architect ...
Waltham, MA · On-site
Use formal tools and static checkers to guarantee RTL quality. You will also support design ... Responsibilities will include driving functional and code coverage as well as timing closure for ...
Waltham, MA · On-site
Use formal tools and static checkers to guarantee RTL quality. You will also support design ... Responsibilities will include driving functional and code coverage as well as timing closure for ...
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$141K - $145K/yr
Full-time
Re-posted 3 days ago
9.6
Based on 18 frontline employees who took The Breakroom Quiz
6th of 247 rated software companies
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
NVIDIA is looking for best-in-class Physical Design Engineers with expertise in Synthesis to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in crafting our groundbreaking and innovating chips, enjoy working in meaningful, growing and professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Own RTL-to-gate synthesis and QoR convergence for complex digital blocks and hierarchical partitions.
Optimize synthesis strategies, constraints, and flows to meet performance, power, and area targets.
Analyze design bottlenecks and QoR regressions, collaborating with RTL, timing, architecture, and physical design teams to resolve them.
Support physical implementation from floorplanning and power planning through routing and timing closure.
Automate design setup, execution, reporting, and issue triage while improving project-wide methodologies and best known methods.
What we need to see:
BSEE, MSEE, or equivalent experience.
2+ years of experience in synthesis and physical implementation on advanced process nodes.
Strong proficiency with Synopsys Fusion Compiler, Cadence Genus, or comparable synthesis tools.
Hands-on experience with synthesis constraints, timing analysis, QoR optimization, and the full place-and-route flow.
Strong analytical and debugging skills across RTL, synthesis, timing, and physical implementation.
Proficiency in Python, Perl, Tcl, and Make.
Strong communication and multi-functional collaboration skills.
We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
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NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Computer and electronic product manufacturing
10,000+ Employees
Santa Clara, CA, US
