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Sta Static Timing Analysis Engineer Jobs in Iowa

Sr. FPGA Engineer

Cedar Rapids, IA ยท On-site

$127K - $163K/yr

Sr. FPGA Engineer Location: Cedar Rapids, IA -onsite work only Fulltime Aerospace domain. Visa: U.S ... static timing and power analysis, and requirements based design verification. * Prototype ...

Traffic Engineer

Des Moines, IA ยท On-site

$84K - $115K/yr

As a Traffic Engineer at Houston Engineering, Inc. (HEI), you'll face new challenges and ... Optimize traffic signal timing to enhance traffic flow and reduce congestion. * Analyze traffic and ...

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Sta Static Timing Analysis Engineer information

What are STA (Static Timing Analysis) Engineers?

STA (Static Timing Analysis) Engineers are specialists in the semiconductor industry who analyze and verify the timing performance of digital circuits without requiring dynamic simulation. They use specialized software tools to ensure that signal transitions occur within required time constraints, preventing issues like data corruption or circuit malfunction. Their work is crucial in the design and validation stages of integrated circuits (ICs), helping to guarantee that chips will function reliably at specified speeds and under different conditions.

What are some common challenges faced by STA Static Timing Analysis Engineers during project cycles?

STA Static Timing Analysis Engineers often encounter challenges related to tight project deadlines and complex design specifications. Balancing multiple design corners, managing timing closure for increasingly smaller technology nodes, and coordinating with physical design, synthesis, and verification teams are key hurdles. Additionally, staying updated with evolving EDA tools and methodologies is essential to ensure accurate analysis. Effective communication and troubleshooting skills are critical to resolve timing violations and deliver high-quality silicon on schedule.

What are the key skills and qualifications needed to thrive as a Static Timing Analysis (STA) Engineer, and why are they important?

To thrive as a Static Timing Analysis Engineer, you need a solid background in digital circuit design, timing concepts, and typically a degree in electrical or computer engineering. Proficiency with EDA tools such as Synopsys PrimeTime, Cadence Tempus, and scripting languages like TCL or Perl is essential. Strong problem-solving abilities, attention to detail, and effective communication skills set top performers apart in this role. These competencies ensure accurate timing verification, efficient collaboration, and successful delivery of complex semiconductor projects.
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Infographic showing various Sta Static Timing Analysis Engineer job openings in Iowa as of July 2026, with employment types broken down into 77% Full Time, and 23% Part Time. Highlights an 91% In-person, and 9% Remote job distribution.

Sr Electrical Engineer - FPGA (Onsite)

Raytheon Technologies

Cedar Rapids, IA โ€ข On-site

$101K - $137K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 11 days ago


Job description

Date Posted:
2026-04-23
Country:
United States of America
Location:
US-IA-CEDAR RAPIDS-121 ~ 350 Collins Rd NE ~ BLDG 121
Position Role Type:
Onsite
U.S. Citizen, U.S. Person, or Immigration Status Requirements:
U.S. citizenship is required, as only U.S. citizens are authorized to access information under this program/contract.
Security Clearance Type:
None/Not Required
Security Clearance Status:
Not Required
Become part of a growing Avionics FPGA/ASIC team. This position is for a highly experienced, highly motivated Electrical or Computer Engineer that will be involved in the design, implementation, verification and integration of a wide variety of high-performance ASICs, FPGAs, and SoPCs for Collins Avionics solutions. As an engineer in this organization, you will be employing best practice design and verification methodologies supporting our legacy and next generation Displays, Computing, and Networking Products.
What You Will Do:
  • Requirements capture, decomposition, and traceability.
  • ASIC/FPGA/SoPC digital architecture development and design.
  • Develop RTL design code and simulation in VHDL, Verilog, and/or SystemVerilog.
  • Create UVM constrained random environments using SystemVerilog.
  • Create placement and timing constraints.
  • Perform synthesis, place and route.
  • Perform static timing analysis, linting analysis, LEC, and clock-domain-crossing analysis.
  • Perform ASIC/FPGA/SoPC verification using inspection, analysis, simulation, and test methods.
  • Creation of DO-254 DAL-A certification artifacts for Airborne Electronic Hardware (AEH).
  • Conduct and/or participate in peer reviews throughout product lifecycle.
  • Participate in FAA SOI audits.
  • Create engineering bids and support RFIs and RFPs.
  • Communicate well with a wide variety of individuals including Engineering, Program Management, internal leadership and customers.
  • May perform the duties of a project engineer.
  • Recommend new tools and practices for continuous improvement in the group's ASIC/FPGA design flow.
  • Provide guidance or mentor other engineers with a variety of skills and backgrounds.

Qualifications You Must Have:
  • Typically requires a University Degree and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience
  • Experience writing RTL and test benches using VHDL, Verilog, or SystemVerilog.
  • Experience using FPGA specific tools (e.g. Questasim, Vivado, Libero, Synplify Pro, etc.).
  • Experience with data interfaces (PCIe, DDR, I2C, Ethernet, CDN, ARINC-429, etc.).
  • Experience with device level timing and clock domain crossing.
  • Experience with Linux (or Unix), scripting, C/C++, Python, and/or Perl.
  • Ability to work with minimal supervision, as part of a team of engineers with a variety of skills and backgrounds, located throughout the world and matrixed into projects with aggressive schedules and frequent milestones.

Qualifications We Prefer:
  • Experience with UVM Constrained Random Methodology.
  • Experience with DO-254 processes and design assurance activities for ASIC, FPGA, and/or SoPC developments.
  • Experience with video and/or networking concepts and architectures.
  • Familiarity with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, code coverage, LEC, SystemVerilog).
  • Experience successfully managing cost, schedule, and performance objectives.
  • Basic risk management skills (identify, quantify, and mitigate risks).

What We Offer:
Some of our competitive benefits package includes:
  • Medical, dental, and vision insurance
  • Three weeks of vacation for newly hired employees
  • Generous 401(k) plan that includes employer matching funds and separate employer retirement contribution, including a Lifetime Income Strategy option
  • Tuition reimbursement program
  • Student Loan Repayment Program
  • Life insurance and disability coverage
  • Optional coverages you can buy pet insurance, home and auto insurance, additional life and accident insurance, critical illness insurance, group legal, ID theft protection
  • Birth, adoption, parental leave benefits
  • Ovia Health, fertility, and family planning
  • Adoption Assistance
  • Autism Benefit
  • Employee Assistance Plan, including up to 10 free counseling sessions
  • Healthy You Incentives, wellness rewards program
  • Doctor on Demand, virtual doctor visits
  • Bright Horizons, child and elder care services
  • Teladoc Medical Experts, second opinion program
  • And more!

May be eligible for relocation.
Learn More & Apply Now!
Avionics delivers advanced cockpit displays, vision systems, and comprehensive digital solutions for global government, commercial and business aviation customers. We provide connectivity and managed data services to ensure safety and seamless communication for passengers, crews, and militaries, from aircraft and airports to air traffic management. Join us in creating solutions that connect the world, one flight at a time. Start your application today.
*Please ensure the role type (defined below) is appropriate for your needs before applying to this role.
Onsite: Employees who are working in Onsite roles will work primarily onsite. This includes all production and maintenance employees, as they are essential to the development of our products.
At Collins, the paths we pave together lead to limitless possibility. And the bonds we form - with our customers and with each other -- propel us all higher, again and again.
Apply now and be part of the team that's redefining aerospace, every day.
As part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in-person at one of our office locations, regardless of whether the role is designated as on-site, hybrid or remote.
The salary range for this role is 86,800 USD - 165,200 USD. The salary range provided is a good faith estimate representative of all experience levels. RTX considers several factors when extending an offer, including but not limited to, the role, function and associated responsibilities, a candidate's work experience, location, education/training, and key skills.
Hired applicants may be eligible for benefits, including but not limited to, medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays. Specific benefits are dependent upon the specific business unit as well as whether or not the position is covered by a collective-bargaining agreement.
Hired applicants may be eligible for annual short-term and/or long-term incentive compensation programs depending on the level of the position and whether or not it is covered by a collective-bargaining agreement. Payments under these annual programs are not guaranteed and are dependent upon a variety of factors including, but not limited to, individual performance, business unit performance, and/or the company's performance.
This role is a U.S.-based role. If the successful candidate resides in a U.S. territory, the appropriate pay structure and benefits will apply.
RTX anticipates the application window closing approximately 40 days from the date the notice was posted. However, factors such as candidate flow and business necessity may require RTX to shorten or extend the application window.
RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified Individuals with a Disability and Protected Veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans' Readjustment Assistance Act.
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