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Soc Power Management Architect Jobs (NOW HIRING)

Velaura

Power Management Architect

Santa Clara, CA · On-site

$200K - $300K/yr

As Power Management Architect for our Physical AI System-on-Chip (SoC), you will own the power ... Own the SoC power architecture: define power domains, voltage/frequency (DVFS) strategy, power ...

Velaura

Power Management Architect

Santa Clara, CA · On-site

$200K - $300K/yr

As Power Management Architect for our Physical AI System-on-Chip (SoC), you will own the power ... Own the SoC power architecture: define power domains, voltage/frequency (DVFS) strategy, power ...

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Soc Power Management Architect information

See salary details

$46.5K

$128.8K

$201.5K

How much do soc power management architect jobs pay per year?

As of Sep 11, 2026, the average yearly pay for soc power management architect in the United States is $128,756.00, according to ZipRecruiter salary data. Most workers in this role earn between $91,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What is a SoC Power Management Architect?

SoC Power Management Architects are specialized engineers who design and implement power management strategies for System-on-Chip (SoC) devices. Their role involves optimizing power consumption, improving battery life, and ensuring efficient energy use in integrated circuits used in smartphones, tablets, IoT devices, and more. They work closely with hardware and software teams to develop power domains, voltage scaling techniques, and low-power modes. Their expertise is essential for creating energy-efficient electronic products that meet performance and thermal requirements.

What are the main challenges faced by a SoC Power Management Architect when optimizing power efficiency without compromising performance?

As an SoC Power Management Architect, one of the primary challenges is finding the right balance between reducing power consumption and maintaining high performance. This involves designing and implementing intricate power domains, managing voltage and frequency scaling, and coordinating with hardware, firmware, and software teams to ensure all components work harmoniously. Additionally, you need to stay updated on the latest process technologies and industry standards, as well as address issues like thermal constraints and battery life expectations. Effective communication and cross-functional collaboration are crucial in overcoming these challenges and delivering a robust, energy-efficient SoC design.

What are the key skills and qualifications needed to thrive as a SoC Power Management Architect, and why are they important?

To thrive as a SoC Power Management Architect, you need a solid background in electrical engineering, low-power design techniques, and experience with system-on-chip (SoC) architectures, often supported by a relevant degree. Familiarity with power analysis tools, hardware description languages (like Verilog or VHDL), and simulation environments such as SPICE or UPF is typically required. Strong problem-solving skills, effective communication, and the ability to collaborate with cross-functional teams help make someone stand out in this position. These skills are crucial for designing efficient and reliable SoC power systems, reducing energy consumption, and ensuring optimal device performance.

What is the difference between Soc Power Management Architect vs Soc Design Engineer?

AspectSoc Power Management ArchitectSoc Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, specialized in power managementBachelor's/Master's in Electrical/Electronic Engineering, focus on chip design
Work EnvironmentDesign teams, R&D labs, collaboration with hardware and firmware teamsDesign teams, hardware development labs, simulation and testing environments
Industry UsageSemiconductor companies, mobile device manufacturers, IoT device firmsSemiconductor companies, consumer electronics, embedded systems

The Soc Power Management Architect focuses on designing power efficiency strategies and managing power domains within SoCs, while the Soc Design Engineer concentrates on the overall chip design, including logic and architecture. Both roles require electrical engineering expertise but differ in their focus areas and responsibilities within the semiconductor industry.

What are popular job titles related to Soc Power Management Architect jobs?

For Soc Power Management Architect jobs, the most frequently searched job titles are:

Infographic showing various Soc Power Management Architect job openings in the United States as of September 2026, with employment types broken down into 1% As Needed, 82% Full Time, 15% Part Time, and 2% Contract. Highlights an 87% Physical, 2% Hybrid, and 11% Remote job distribution, with an average salary of $128,756 per year, or $61.9 per hour.

SoC Power Management Architect

Santa Clara, CA • On-site

Ampere Computing LLC
Manufacturing • 1 - 5K employees
Learn more about Ampere Computing LLCexternal

$147K - $220K/yr

Full-time

Medical, Dental, Vision, Retirement

Re-posted 7 days ago

Key responsibilities

  • Support end-to-end SoC power management architecture by translating product power and performance goals into SoC and IP-level requirements.

  • Collaborate with product and cross-functional teams to develop and integrate power management solutions that meet power, performance, and energy-efficiency targets.

  • Participate in architectural reviews and support HW-SW co-design to ensure power management designs align with architectural intent.

Job description

Description
Invent the future with us.
Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute.
As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications.
Join us at Ampere and work alongside a passionate and growing team - we'd love to have you apply!
About the Role:
As a SoC Power Management Architect, you will support and contribute to SoC-level power management architecture. You'll partner with the business unit to understand product power/performance requirements and translate them into SoC and IP-level specification inputs. Working with product and cross-functional teams, you will help deliver robust, data-driven power management solutions where power is constrained. You'll collaborate with global SoC and IP teams to support the development and integration to meet power, performance, and energy-efficiency targets.
What You'll Achieve:
  • Support end-to-end power management architecture by translating product power/performance goals into actionable SoC/IP requirements under guidance of senior architects.
  • Assist in driving SoC and subsystem power management architecture, partnering with Product Power Management Architects to convert product requirements into implementable approaches.
  • Collaborate with subsystem architects to assess and expand IP power capabilities by identifying gaps and proposing new features (using data-driven analysis where available).
  • Contribute to HW/SW/FW trade-offs to deliver feasible, performant, and verifiable power management solutions.
  • Participate in technical direction and architectural reviews, ensuring designs progress toward agreed power management roadmap decisions (escalating as needed).
  • Enable HW-SW codesign execution by partnering with senior architects and firmware developers to ensure integration matches architectural intent.

About you:
  • 3+ years of hands-on SoC power architecture experience , with strong familiarity in SoC low-power concepts
  • HW development know-how, supporting specification-to-integration of low-power features, including familiarity with RTL-level design and verification constraints (or close exposure).
  • Ability to support power optimization efforts using measured/validation results to improve SoC/IP power-saving and confirm impact on performance and energy.
  • Working knowledge of SoC low-power modes and IP low-power capabilities , covering power modes/states, wake-up/latency, and retention behavior.
  • Experience supporting SoC-level power management flows.
  • Cross-functional collaboration and communication skills . Partnering with various stakeholders and engineering teams.
  • Additional skills highly desired: Familiarity with SW/FW; Microcontrollers; HW/SW Co-Design; ARM Architecture; Power States

Education:
  • BS degree in Electrical Engineering, Computer Engineering, or Computer Science & 5 years of related experience, MS degree & 3 years, or PhD & 0 years

What we'll offer:
At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long-term incentive, and comprehensive benefits. The full base pay range for this role is between $147,000 and $220,000, except in the San Francisco Bay Area where the range is between $159,000 and $239,000.
Our benefits include health, wellness, and financial programs that support employees through every stage of life.
Benefits highlights include:
  • Premium medical insurance, dental insurance, vision insurance, as well as income protection and a 401K retirement plan, so that you can feel secure in your health and financial future.
  • Unlimited Flextime and 10+ paid holidays so that you can embrace a healthy work-life balance.
  • A variety of healthy snacks, energizing espresso, and refreshing drinks to keep you fueled and focused throughout the day.

And there are much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about our career opportunities with you through the interview process.
#LI-GW1
#LI-Hybrid
Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law.

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