S. in Mechanical, Electrical or Materials Engineering or equivalent. * 10+ years of hands-on experience in packaging technology development in assembly of IC packages including PoP, SiP, 2/2.5D
S. in Mechanical, Electrical or Materials Engineering or equivalent. * 10+ years of hands-on experience in packaging technology development in assembly of IC packages including PoP, SiP, 2/2.5D
Microelectronics Advanced Packaging Engineer
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Microelectronics Advanced Packaging Engineer
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Advanced Packaging Engineer
$200K - $350K/yr
Exceptional abilities across the full advanced packaging design and tradeoffs * 10+ years of experience on very high performance designs at advanced packaging like SIP, CoWoS, EMIB and other ...
Quick apply
Advanced Packaging Engineer
$200K - $350K/yr
Exceptional abilities across the full advanced packaging design and tradeoffs * 10+ years of experience on very high performance designs at advanced packaging like SIP, CoWoS, EMIB and other ...
Microelectronics Advanced Packaging Engineer
Beavercreek, OH · On-site
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Microelectronics Advanced Packaging Engineer
Beavercreek, OH · On-site
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Microelectronics Advanced Packaging Engineer
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Microelectronics Advanced Packaging Engineer
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Microelectronics Advanced Packaging Engineer
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Microelectronics Advanced Packaging Engineer
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Staff Packaging Engineer
San Diego, CA · On-site
S. in Mechanical, Electrical or Materials Engineering or equivalent. * 6+ years of hands-on experience in packaging technology development in assembly of IC packages including PoP, SiP, 2/2.5D
Staff Packaging Engineer
San Diego, CA · On-site
S. in Mechanical, Electrical or Materials Engineering or equivalent. * 6+ years of hands-on experience in packaging technology development in assembly of IC packages including PoP, SiP, 2/2.5D
Microelectronics Advanced Packaging Engineer
Beavercreek, OH · On-site
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Microelectronics Advanced Packaging Engineer
Beavercreek, OH · On-site
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Microelectronics Advanced Packaging Engineer
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Microelectronics Advanced Packaging Engineer
$61K - $141K/yr
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Engineering Group, Engineering Group > Packaging Engineering General Summary: We are seeking a ... Package (SiP) assembly processes. Proficiency in materials and equipment relevant to these ...
Engineering Group, Engineering Group > Packaging Engineering General Summary: We are seeking a ... Package (SiP) assembly processes. Proficiency in materials and equipment relevant to these ...
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
Applies engineering physics, engineering mathematics and materials science principles to support ... Experience with flip-chip, BGA, WLP, system-in-package SiP, multi-chip modules MCM, panel level ...
ABOUT THE ROLE The Staff SIP Engineer is responsible for designing, implementing, and supporting ... Competitive compensation package, including performance-based bonus potential and comprehensive ...
Quick apply
ABOUT THE ROLE The Staff SIP Engineer is responsible for designing, implementing, and supporting ... Competitive compensation package, including performance-based bonus potential and comprehensive ...
SR. SILICON PACKAGING PROCESS ENGINEER, SILICON TECHNOLOGY (STARLINK) SpaceX is leveraging its ... out FO processes, system-in-package SiP, multi-chip modules MCM, panel level packaging ...
SR. SILICON PACKAGING PROCESS ENGINEER, SILICON TECHNOLOGY (STARLINK) SpaceX is leveraging its ... out FO processes, system-in-package SiP, multi-chip modules MCM, panel level packaging ...
... SiP packaging. * Support pre/post silicon bring up, yield improvement activities, qualification, failure analysis, and system implementation. * Package Layout Expertise: * Lead all aspects of package ...
... SiP packaging. * Support pre/post silicon bring up, yield improvement activities, qualification, failure analysis, and system implementation. * Package Layout Expertise: * Lead all aspects of package ...
... SiP packaging. * Support pre/post silicon bring up, yield improvement activities, qualification, failure analysis, and system implementation. * Package Layout Expertise: * Lead all aspects of package ...
... SiP packaging. * Support pre/post silicon bring up, yield improvement activities, qualification, failure analysis, and system implementation. * Package Layout Expertise: * Lead all aspects of package ...
Package Design Engineer
Santa Clara, CA · On-site
$159K/yr
... SiP packaging. * Support pre/post silicon bring up, yield improvement activities, qualification, failure analysis, and system implementation. * Package Layout Expertise: * Lead all aspects of package ...
Package Design Engineer
Santa Clara, CA · On-site
$159K/yr
... SiP packaging. * Support pre/post silicon bring up, yield improvement activities, qualification, failure analysis, and system implementation. * Package Layout Expertise: * Lead all aspects of package ...
Semiconductor Operations - SiP Productization
$172K - $258K/yr
Support Advance Component SiP and system integration development for future products, including ... engineering, semiconductor packaging, module productization, supplier quality, or high-volume ...
Semiconductor Operations - SiP Productization
$172K - $258K/yr
Support Advance Component SiP and system integration development for future products, including ... engineering, semiconductor packaging, module productization, supplier quality, or high-volume ...
Semiconductor Operations - SiP Productization
Cupertino, CA · On-site
$85K - $116K/yr
They will interface regularly with Engineering, Operations, Reliability, and Quality teams. Strong SiP, semiconductor packaging, module assembly, or advanced packaging experience, including knowledge ...
Semiconductor Operations - SiP Productization
Cupertino, CA · On-site
$85K - $116K/yr
They will interface regularly with Engineering, Operations, Reliability, and Quality teams. Strong SiP, semiconductor packaging, module assembly, or advanced packaging experience, including knowledge ...
IC Package Design / Development
Irvine, CA · On-site
$108K - $192K/yr
... IC Packaging Engineer to drive next-generation package architecture, design, and productization ... Proficiency in Cadence Allegro APD/SIP or comparable packaging design tools. * Experience working ...
IC Package Design / Development
Irvine, CA · On-site
$108K - $192K/yr
... IC Packaging Engineer to drive next-generation package architecture, design, and productization ... Proficiency in Cadence Allegro APD/SIP or comparable packaging design tools. * Experience working ...
IC Package Design / Development
San Jose, CA · On-site
$108K - $192K/yr
... IC Packaging Engineer to drive next-generation package architecture, design, and productization ... Proficiency in Cadence Allegro APD/SIP or comparable packaging design tools. * Experience working ...
IC Package Design / Development
San Jose, CA · On-site
$108K - $192K/yr
... IC Packaging Engineer to drive next-generation package architecture, design, and productization ... Proficiency in Cadence Allegro APD/SIP or comparable packaging design tools. * Experience working ...
Sip Packaging Engineer information
See salary details
$19.71 - $24.02
2% of jobs
$24.02 - $28.32
6% of jobs
$32.42 is the 25th percentile. Wages below this are outliers.
$28.32 - $32.63
17% of jobs
$32.63 - $36.93
16% of jobs
The median wage is $39.08 / hr.
$36.93 - $41.24
16% of jobs
$41.24 - $45.54
12% of jobs
$47.59 is the 75th percentile. Wages above this are outliers.
$45.54 - $49.85
11% of jobs
$49.85 - $54.15
6% of jobs
$54.15 - $58.46
5% of jobs
$58.46 - $62.76
4% of jobs
$62.76 - $67.07
3% of jobs
$19
$42
$67
How much do sip packaging engineer jobs pay per hour?
What is the difference between Sip Packaging Engineer vs Container Packaging Engineer?
| Aspect | Sip Packaging Engineer | Container Packaging Engineer |
|---|---|---|
| Credentials | Bachelor's in Packaging Engineering or related field, certifications like CPP | Bachelor's in Packaging Engineering or related field, certifications like CPP |
| Work Environment | Manufacturing plants, R&D labs, quality control | Manufacturing facilities, design departments, quality assurance |
| Industry Usage | Electronics, pharmaceuticals, consumer goods | Food, beverages, chemicals, pharmaceuticals |
| Common Search/Comparison | Yes | Yes |
The main difference between a Sip Packaging Engineer and a Container Packaging Engineer lies in their focus areas. Sip Packaging Engineers typically work on packaging solutions for small, specialized containers like vials or bottles used in electronics or pharmaceuticals. Container Packaging Engineers often focus on larger containers such as drums, bottles, or cans used in food, beverages, or chemicals. Both roles require similar credentials and work environments but serve different product types and industries.
What are the key skills and qualifications needed to thrive as a Sip Packaging Engineer, and why are they important?
What are some common challenges Sip Packaging Engineers face when developing new beverage packaging solutions?

Qualcomm rating
9.6
Based on 5 frontline employees who took The Breakroom Quiz
4th of 186 rated software companies
Job description
Qualcomm Technologies, Inc.
Job Area:
Engineering Group, Engineering Group > Packaging Engineering
General Summary:
Come join us and create what has yet to be imagined. Qualcomm invents foundational technologies that transform how the world connects, computes, and communicates. We are a brand of inventors for innovators. When we break through, the world leaps forward.
In this highly visible role, you will be responsible for developing advanced 2.5D packaging technologies and defining baseline assembly processes that are optimized for performance, reliability, yield, and cost across multiple product application spaces for high performance computing. Extensive knowledge and experience in 2.5D package technology development including architecture definition, assembly processes, thermal-mechanical, materials, and chip-package-interactions are required. This position also requires the ability to lead cross-functional teams, manage multiple foundries and OSATs, and resolve complex technical issues.
Principal Duties & Responsibilities
- Hand on experience with large body size FCBGA/LGA , FCCSP assembly including die prep, chip attach, underfill, lid/stiffener attach, ball attach, process optimization, material selection, DOE planning, execution, and data analysis
- Strong analytical, project management and communication skills working with internal and external cross function teams
- Additional experience and knowledge on ABF buildup substrate, EMIB, design and wafer bumping processes is a plus
- Work with OSAT, material and equipment suppliers to bring up new process along with driving NPI and HVM deployment.
- Working with X-functional team to drive packaging structures
Minimum Qualifications:
• Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 6+ years of System/Package Design/Technology Engineering or related work experience.
OR
Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 5+ years of System/Package Design/Technology Engineering or related work experience.
OR
PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 4+ year of System/Package Design/Technology Engineering or related work experience.
Preferred Qualifications:
- M.S. in Mechanical, Electrical or Materials Engineering or equivalent.
- 10+ years of hands-on experience in packaging technology development in assembly of IC packages including PoP, SiP, 2/2.5D
- Understanding semiconductor industry packaging trends, end-user packaging considerations, and previous experience with high performance computing products.
- Knowledge of reliability standards, test methods, qualification procedures, and failure analysis techniques.
- Familiarity with substrate manufacturing processes and design rules.
- Excellent verbal and written communication skills.
- Demonstrated organized technical project management skills.
- Ability to work independently and lead multiple programs.
- hAbility to lead multi-functional teams to solve complex technical problems.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range and Other Compensation & Benefits:
$180,400.00 - $270,600.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
About Qualcomm
Sourced by ZipRecruiter
Qualcomm is enabling a world where everyone and everything can be intelligently connected. You interact with products and technologies made possible by Qualcomm every day, including 5G-enabled smartphones that double as pro-level cameras and gaming devices, smarter vehicles and cities, and the technology behind the smart, connected factories that manufactured your latest purchase. Our powerful connectivity solutions keep you connected—even in remote areas. Qualcomm 5G and AI innovations are the power behind the connected intelligent edge. You’ll find our technologies behind and inside the innovations that deliver significant value across multiple industries and to billions of people every day.
Industry
Technology, communication and media
Company size
10,000+ Employees
Headquarters location
San Diego, CA, US
Year founded
1985