A deep understanding of SerDes design and validation principles, SOC/system integration, and real-world system environments is required. The role demands strong collaboration with design ...
A deep understanding of SerDes design and validation principles, SOC/system integration, and real-world system environments is required. The role demands strong collaboration with design ...
A deep understanding of SerDes design and validation principles, SOC/system integration, and real-world system environments is required. The role demands strong collaboration with design ...
A deep understanding of SerDes design and validation principles, SOC/system integration, and real-world system environments is required. The role demands strong collaboration with design ...
... SerDes IP ... In this highly visible role, you will actively work within Analog-Mixed/Signal design team and ...
... SerDes IP ... In this highly visible role, you will actively work within Analog-Mixed/Signal design team and ...
High speed serdes - minimum 25Gbps/lane * PAM4 based serdes design/validation * Optical DVT Thorough understanding of PCB design/review. Shall be mastered in High speed design concepts of PCB, High ...
High speed serdes - minimum 25Gbps/lane * PAM4 based serdes design/validation * Optical DVT Thorough understanding of PCB design/review. Shall be mastered in High speed design concepts of PCB, High ...
SerDes System Validation Engineer
$126K - $220K/yr
... SerDes IP ... In this highly visible role, you will actively work within Analog-Mixed/Signal design team and ...
SerDes System Validation Engineer
$126K - $220K/yr
... SerDes IP ... In this highly visible role, you will actively work within Analog-Mixed/Signal design team and ...
You will serve as the primary technical authority bridging SerDes IP development and real-world ... Experience with high-speed PCB design, channel simulation (ADS, HSPICE), and compliance testing
You will serve as the primary technical authority bridging SerDes IP development and real-world ... Experience with high-speed PCB design, channel simulation (ADS, HSPICE), and compliance testing
SerDes System Validation Engineer
Cupertino, CA · On-site
$181K - $318K/yr
... SerDes IP ... In this highly visible role, you will actively work within Analog-Mixed/Signal design team and ...
SerDes System Validation Engineer
Cupertino, CA · On-site
$181K - $318K/yr
... SerDes IP ... In this highly visible role, you will actively work within Analog-Mixed/Signal design team and ...
SerDes/DSP System, Architect - 17009
Sunnyvale, CA · On-site
$209K - $313K/yr
We lead in chip design, verification, and IP integration, empowering the creation of high ... Developing and maintaining SerDes system models for PAM4 transceivers targeting PCIe (128Gbps+) and ...
SerDes/DSP System, Architect - 17009
Sunnyvale, CA · On-site
$209K - $313K/yr
We lead in chip design, verification, and IP integration, empowering the creation of high ... Developing and maintaining SerDes system models for PAM4 transceivers targeting PCIe (128Gbps+) and ...
You will serve as the primary technicalauthoritybridging SerDes IP development and real-world ... Experience with high-speed PCB design, channel simulation (ADS, HSPICE), and compliance testing
You will serve as the primary technicalauthoritybridging SerDes IP development and real-world ... Experience with high-speed PCB design, channel simulation (ADS, HSPICE), and compliance testing
Senior SerDes Analog Design
Fort Collins, CO · On-site
$199K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Senior SerDes Analog Design
Fort Collins, CO · On-site
$199K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Quick apply
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Quick apply
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Quick apply
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Quick apply
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Lead SERDES RTL Design Engineer
San Jose, CA · On-site
$203K/yr
SerDes Technology group is seeking a talented, motivated and self-driven SerDes Micro Architect with expertise in high-speed SerDes RTL design. You have had significant success driving architecture ...
Lead SERDES RTL Design Engineer
San Jose, CA · On-site
$203K/yr
SerDes Technology group is seeking a talented, motivated and self-driven SerDes Micro Architect with expertise in high-speed SerDes RTL design. You have had significant success driving architecture ...
As the SerDes Digital Design Lead at Eliyan, you will drive the architecture and implementation of next-generation high-speed serial link IPs targeting 224G and 448G data rates for chiplet-based ...
Quick apply
As the SerDes Digital Design Lead at Eliyan, you will drive the architecture and implementation of next-generation high-speed serial link IPs targeting 224G and 448G data rates for chiplet-based ...
Serdes Design information
See salary details
$14.18 - $16.91
2% of jobs
$16.91 - $19.65
11% of jobs
$22.11 is the 25th percentile. Wages below this are outliers.
$19.65 - $22.38
14% of jobs
$22.38 - $25.11
18% of jobs
The median wage is $26.18 / hr.
$25.11 - $27.84
15% of jobs
$27.84 - $30.57
15% of jobs
$30.91 is the 75th percentile. Wages above this are outliers.
$30.57 - $33.30
11% of jobs
$33.30 - $36.04
7% of jobs
$36.04 - $38.77
4% of jobs
$38.77 - $41.50
3% of jobs
$41.50 - $44.23
1% of jobs
$14
$27
$44
How much do serdes design jobs pay per hour?
What are the key skills and qualifications needed to thrive as a SerDes Design Engineer, and why are they important?
What are some common challenges faced by Serdes Design engineers, and how can they be addressed?
What is SerDes design?
Are design engineers well paid?
What is the difference between Serdes Design vs FPGA Design Engineer?
| Aspect | Serdes Design | FPGA Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, specialized in high-speed signaling | Bachelor's or Master's in Electrical or Computer Engineering, with FPGA focus |
| Work Environment | Semiconductor companies, high-speed circuit labs | Electronics companies, FPGA development teams |
| Industry Usage | High-speed data communication, networking hardware | Digital system development, embedded systems |
| Common Search/Comparison | Yes | Yes |
Serdes Design focuses on developing high-speed serial transceivers for data communication, requiring expertise in analog and high-speed digital circuits. FPGA Design Engineers develop digital logic on FPGA platforms, often integrating Serdes modules but with broader responsibilities in digital system design. While both roles overlap in digital electronics and high-speed signaling, Serdes Design is specialized in transceiver architecture, whereas FPGA Design Engineers work on implementing entire digital systems on FPGA chips.

Full-time
Posted 16 days ago
Apple rating
8.1
Based on 661 frontline employees who took The Breakroom Quiz
6th of 30 rated technology retailers
Job description
You will architect validation strategies that go beyond traditional spec-checking, focusing on uncovering weaknesses in design assumptions, stress-to-fail conditions, and system interactions across wide-ranging PVT and real-world scenarios, including edge case behaviors. A deep understanding of SerDes design and validation principles, SOC/system integration, and real-world system environments is required. The role demands strong collaboration with design, architecture, and system teams to ensure the IP is designed with design for testability. In addition, you will also partner closely with the validation team to help optimize for maximum test coverage vs. execution time, ensuring efficient yet thorough validation. This is a hands-on lab role that requires close collaboration with designers, architects, system, and test engineers to validate next-generation SerDes IPs from design conception through production.
BS and 20 +years of relevant industry experience
PhD in Electrical Engineering or related field with 20+ years of experience in SerDes IP validation, AMS circuit design, or silicon/system-level debug.Hands-on lab experience with lab instrumentations such as oscilloscopes, BERTs, protocol analyzers, etc, and measurement setups tailored for SerDes PHYs.Deep understanding of high-speed serial link protocols (PCIe, USB, Ethernet, DisplayPort, etc.) and equalization techniques (such as CTLE, DFE, FFE, etc.)Strong foundation in analog/mixed-signal design principles and familiarity with signal integrity (SI) and power integrity (PI) impacts.Skilled in programming (Python, C/C++, etc.) and data analysis tools for validation automation and correlation studies.Proven ability to break down complex problems, isolate issues, and root-cause at the circuit, protocol, and system levels.Demonstrated experience in design-for-validation, including fault injection, internal monitors, and behavioral hooks.Experience validating multi-lane PHYs with adaptive EQ, clocking and CDR paths, and challenging compliance requirements in various real systems.Familiarity with production and characterization flows, including margin-to-fail and stress testing techniques.Ability to guide test coverage optimization to reduce execution time without sacrificing risk coverage.Experience providing post-silicon insights that shaped future design changes.Passion for deep debug and a "find the flaw" mentality, with an interest to explore the unexpected.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976