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Senior Ic Layout Engineer Jobs in Florida (NOW HIRING)

Qorvo, Inc.

Staff Layout Design Engineer

Tallahassee, FL

$144K - $187K/yr

Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC ... BSEE/BS Engineering Technology or related program * Comfortable with CMOS and SOI technologies ...

New

Renesas Electronics

Mask Designer 5

Palm Bay, FL

A good working knowledge of IC layout methodologies, flows and CAD tools such as Cadence Virtuoso ... With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer ...

Renesas Electronics

Mask Designer 5

Palm Bay, FL

A good working knowledge of IC layout methodologies, flows and CAD tools such as Cadence Virtuoso ... With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer ...

Renesas Electronics

Mask Designer 5

Palm Bay, FL · On-site

A good working knowledge of IC layout methodologies, flows and CAD tools such as Cadence Virtuoso ... With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer ...

DoiT

Corporate FP&A Lead

Tampa, FL · On-site +1

Manage, develop, and performance-review the Senior IC and Junior IC. Weekly 1:1s with each. * Approve the Finance Engineer's FP&A automation roadmap quarterly. * Build trusted relationships with all ...

Opendoor

Senior Manager, Marketing Technology

Miami, FL · On-site

$85 - $115/hr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

You'll also drive cross-functional initiatives with Engineering, Product, and Growth Science to get critical tracking and infrastructure work prioritized. Senior IC role, no direct reports. What You ...

Micross

Package Design Engineer | Semiconductor

Apopka, FL · On-site

$119K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Work with IC design team to define IC package requirements * Design package layout using standard ... Bachelors degree in Electrical Engineering, Mechanical Engineering, or other semiconductor ...

Micross Components

Semiconductor Package Design Engineer

Apopka, FL · On-site

$119K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

... engineering teams to design custom interposer and substrates * Work with SoC design teams to ... Work with IC design team to define IC package requirements * Design package layout using standard ...

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Senior Ic Layout Engineer information

What is a senior IC layout engineer?

Senior IC Layout Engineers are specialized professionals who design and implement the physical layout of integrated circuits (ICs) on semiconductor chips. They translate circuit schematics into detailed geometric representations that can be fabricated onto silicon wafers. Their role involves ensuring optimal placement of components, routing of interconnections, and compliance with design rules to achieve desired performance, power, and area targets. Senior engineers typically have advanced experience, oversee complex projects, and may mentor junior team members. They play a critical role in the development of high-performance electronics used in various industries.

What are the key skills and qualifications needed to thrive as a senior IC layout engineer?

To thrive as a Senior IC Layout Engineer, you need expertise in analog and digital IC layout, deep understanding of semiconductor process technologies, and typically a degree in electrical engineering or a related field. Proficiency in layout design tools such as Cadence Virtuoso, familiarity with DRC/LVS verification tools, and knowledge of industry standards are essential. Strong attention to detail, problem-solving skills, and effective communication help ensure collaboration with design and verification teams. These competencies are crucial for creating high-performance, manufacturable integrated circuits that meet rigorous quality and reliability standards.

What are the main challenges senior IC layout engineers face when working on complex analog or mixed-signal designs?

Senior IC Layout Engineers often encounter challenges related to meeting stringent design specifications, such as minimizing parasitic effects, ensuring signal integrity, and optimizing area usage. Managing multiple iterations with circuit designers and verification teams to address performance and reliability concerns can be demanding, especially under tight project timelines. Additionally, staying updated with evolving EDA tools and process technologies is essential for maintaining productivity and delivering high-quality layouts.

What is the difference between Senior IC Layout Engineer vs IC Design Engineer?

AspectSenior IC Layout EngineerIC Design Engineer
Primary FocusPhysical layout, placement, routing of integrated circuitsCircuit design, schematic development, functional verification
Skills & CertificationsEDA tools, layout best practices, design rulesCircuit theory, HDL languages, simulation tools
Work EnvironmentFoundries, semiconductor companies, design housesDesign firms, semiconductor companies, R&D labs

While both roles collaborate closely in chip development, the Senior IC Layout Engineer specializes in the physical implementation of circuits, focusing on layout and fabrication constraints. In contrast, the IC Design Engineer concentrates on creating and verifying circuit functionality at the schematic level. Both roles require strong technical skills but differ in their core responsibilities within the chip design process.

What are the most commonly searched types of Ic Layout Engineer jobs in Florida?

The most popular types of Ic Layout Engineer jobs in Florida are:

What cities in Florida are hiring for Senior Ic Layout Engineer jobs?

Cities in Florida with the most Senior Ic Layout Engineer job openings:

Senior Ic Layout Engineer jobs near you

Staff Layout Design Engineer

Qorvo, Inc.

Tallahassee, FL

$144K - $187K/yr

Full-time

Posted 3 days ago

New

Qorvo rating

8.3

Company rating: 8.3 out of 10

Based on 21 frontline employees who took The Breakroom Quiz

Job description

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.

In this position, you will work closely with design engineering groups to complete the layout and verification of high-performance Switches, Power Management Devices, and Integrated Products using Cadence Virtuoso XL and Mentor's Calibre tools.

Responsibilities

  • Work closely with design engineers to ensure proper circuit performance
  • Design analog and RF layout
  • Understand device matching techniques
  • Excellent teamwork skills, including written and verbal communications, with both local and remote design teams
  • Exceptional layout planning and integration skills from small block to full chip

Skills and Qualifications

  • Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC layout experience
  • Ability to layout analog circuitry in a size/time constrained environment
  • Understand layout techniques such as common centroid, matching, isolation, and the use of dummy devices
  • Ability to solve design problems using technical skills, intuition, and creativity
  • Proficiency in floorplanning and assembly from block to full chip level
  • Working knowledge of Cadence and Mentor Verification tools
  • Strong LVS troubleshooting and debug skills
  • Demonstrated ability to work individually and in a team-orientated environment

Preferred Skills and Qualifications

  • BSEE/BS Engineering Technology or related program
  • Comfortable with CMOS and SOI technologies across multiple foundry PDKs
  • Demonstrated ability to contribute ideas for improved schematic and layout interaction
  • Schematic entry for dummy devices, resizing devices, and debugging LVS issues.

This position is not eligible for visa sponsorship by the Company.

Competitive base salary commensurate with experience: $144,300 - $187,600, relevant for the California Bay Area (subject to change dependent on physical location) 

Posted salary ranges are made in good faith. Qorvo reserves the right to adjust ranges depending on the experience/qualification of the selected candidate as well as external competitiveness and internal comparability. 

Base compensation is one element of Total Rewards offered at Qorvo. More information on the Total Rewards package can be shared upon request. 

#LI-SM1

MAKE A DIFFERENCE AT QORVO   

 We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets - we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.

We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability. 

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