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Senior Asic Design Engineer Jobs in Philadelphia, PA

Chipton Ross

FPGA/ASIC Design Engineer

Camden, NJ · On-site

$124.10K - $171K/yr

Job #215247 Chipton-Ross is seeking an FPGA/ASIC Design Engineer for a contract opportunity in ... Looking for mid-senior level folks Proficient in VHDL >5 yrs, Xilinx FPGA design EDA- Vivado Must ...

Havis Inc

Sr. Design Engineer

Warminster, PA · On-site

Senior Design Engineer Department: Engineering Accountability: This position reports to the Sr. Engineering Manager Responsibilities * Lead project teams in the product development process * Design ...

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Senior Asic Design Engineer information

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$133.8K

$169.8K

$209.8K

How much do senior asic design engineer jobs pay per year?

As of May 28, 2026, the average yearly pay for senior asic design engineer in Philadelphia, PA is $169,788.00, according to ZipRecruiter salary data. Most workers in this role earn between $152,000.00 and $186,400.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Senior ASIC Design Engineer, and why are they important?

To thrive as a Senior ASIC Design Engineer, you need deep expertise in digital and/or analog circuit design, strong knowledge of hardware description languages (HDLs) like Verilog or VHDL, and a relevant engineering degree. Familiarity with EDA tools such as Synopsys, Cadence, and Mentor Graphics, as well as experience with simulation, synthesis, and verification methodologies, is typically required. Outstanding problem-solving, collaboration, and communication skills set top performers apart in this role. These competencies ensure efficient design cycles, robust chip functionality, and successful delivery of complex semiconductor projects.

What are some common challenges Senior ASIC Design Engineers face when collaborating with cross-functional teams?

Senior ASIC Design Engineers often work closely with verification, software, and systems teams throughout the development cycle. One common challenge is ensuring clear communication of design specifications and changes, as misunderstandings can lead to integration issues or delays. Balancing multiple project timelines and adapting to evolving requirements from other departments can also be demanding. Building strong, collaborative relationships and using robust documentation and project management tools are key to overcoming these challenges.

What does a Senior ASIC Design Engineer do?

A Senior ASIC Design Engineer is responsible for designing and developing Application-Specific Integrated Circuits (ASICs) used in a wide range of electronic devices. They lead the architecture, implementation, and verification of complex digital or mixed-signal circuits, often collaborating with cross-functional teams. This senior role involves optimizing designs for performance, power, and area while ensuring that the final product meets stringent technical and quality requirements. Additionally, they may mentor junior engineers and contribute to design methodologies and best practices within the organization.

What is the difference between Senior Asic Design Engineer vs Digital IC Design Engineer?

AspectSenior Asic Design EngineerDigital IC Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, VLSI, or related fields; experience in ASIC designBachelor's/Master's in Electrical Engineering, VLSI, or related fields; focus on digital circuit design
Work EnvironmentDesign teams in semiconductor or tech companies, hardware development labsIntegrated circuit design teams, research labs, semiconductor companies
Employer & Industry UsageUsed in ASIC development, FPGA design, hardware accelerationUsed in digital chip design, FPGA development, digital system integration

The main difference is that a Senior Asic Design Engineer specializes in designing application-specific integrated circuits, often leading complex projects, while a Digital IC Design Engineer focuses on digital circuit design within integrated circuits. Both roles require similar educational backgrounds and work environments but differ in project scope and specialization.

What are popular job titles related to Senior Asic Design Engineer jobs in Philadelphia, PA? For Senior Asic Design Engineer jobs in Philadelphia, PA, the most frequently searched job titles are:
What job categories do people searching Senior Asic Design Engineer jobs in Philadelphia, PA look for? The top searched job categories for Senior Asic Design Engineer jobs in Philadelphia, PA are:
What cities near Philadelphia, PA are hiring for Senior Asic Design Engineer jobs? Cities near Philadelphia, PA with the most Senior Asic Design Engineer job openings:
Senior Asic Design Engineer jobs near you
Infographic showing various Senior Asic Design Engineer job openings in Philadelphia, PA as of May 2026, with employment types broken down into 90% Full Time, 4% Part Time, and 6% Contract. Highlights an 86% Physical, 4% Hybrid, and 10% Remote job distribution, with an average salary of $169,788 per year, or $81.6 per hour.
FPGA/ASIC Design Engineer

FPGA/ASIC Design Engineer

Chipton Ross

Camden, NJ • On-site

$124.10K - $171K/yr

Full-time

Posted 25 days ago

Job description

Job Description
Job #215247
Chipton-Ross is seeking an FPGA/ASIC Design Engineer for a contract opportunity in Camden, NJ.
BASIC QUALIFICATIONS (REQUIRED SKILLS/EXPERIENCE)
At least 3 year experience with proven track record of implementing complex algorithms targeting ASIC/FPGAs.
Bachelor of Science in Electrical Engineering or Computer Science or equivalent Master of Science in Electrical Engineering or Computer Science preferred.
Proficiency in VHDL and FPGA design/debug Xilinx FPGA / Vivado.
Excellent Analytical/Debug skills.
Good verbal, written, and presentation skills.
US Citizenship required.
VHDL Experience is required for all candidates to be considered.
Looking for mid-senior level folks
Proficient in VHDL >5 yrs, Xilinx FPGA design EDA- Vivado
Must have done hands on multiple complex designs arch/design/verification/Synthesis/STA
Big Plus
Working with Ethernet protocol (not just instantiating the IP) Is a big plus.
Mentor EDA CDC/Lint/AC/RDC
POSITION RESPONSIBILITIES
The FPGA/ASIC Design Engineer will be responsible for the architecture, implementation, verification/validation through Software integration test, for delivery of complex FPGAs AND/OR ASICs systems. This is a key, high impact, high visibility role in the organization to ensure robust quality and delivery of Communication products for National Security.
Develop architectures for implementation of high throughput complex designs involving Cryptographic Algorithms (VHDL) with high speed protocols NVMe, PCIe/SRIOV, 10G-400G Ethernet, TCP/IP, and IP development/integration targeting ARM SOC FPGAs (Ex. Xilinx MPSOC) AND/OR ASICs.
Additionally, S/He will be responsible for writing/debugging tests/sequences for End-to-End simulation on UVM framework, with System Verilog Assertions, and also writing/debugging C++ based SW driven validation on SOC evaluation boards (Xilinx MPSOC) running Linux.
PREFERRED QUALIFICATIONS (DESIRED SKILLS/EXPERIENCE)
High Level Synthesis (HLS) with Vivado,
Embedded SW C++ (OOP) and System Verilog Assertions (SVA).
Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet).
PHYSICAL REQUIREMENTS (if noted by client in their req):
REQUIRED EDUCATION
Bachelor of Science in Electrical Engineering or Computer Science or equivalent Master of Science in Electrical Engineering or Computer Science preferred.
  • Education MUST be accredited**

WORK HOURS
Full-Time
Monday-Friday 08:00am-05:00pm
ADDITIONAL
Active secret clearance required.
ADDITIONAL INFORMATION
  • Applicants responding to this position will be subject to a government security investigation and must meet eligibility requirements by currently possessing the ability to view classified government information.
  • Employment will be contingent on clearing a drug screen and background check. Both must clear prior to start date.
  • Candidates responding to this posting must currently possess the eligibility to work in the United States. No third parties please.

For more information, please apply or contact:
Robert Davis 800.927.9318 x305
rdavis@chiptonross.com
Chipton-Ross provides equal employment opportunities to all employees and applicants for employment without regard to race, color, creed, religion, national origin, sex (including pregnancy), age, disability, sexual orientation, gender identity and/or expression, protected veteran status, genetic information, or any other characteristic protected by Federal, State or local law. This policy governs all areas of employment at Chipton-Ross, including recruiting, hiring, training, assignment, promotions, compensation, benefits, discipline, and terminations.
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About Chipton-Ross

Sourced by ZipRecruiter

Chipton-Ross, based in El Segundo, California, is a leading provider of staffing and recruitment services in the US. The company is renowned for its specialization in fields like engineering, information technology, aircraft manufacturing, and other technical industries. Founded in 1983, Chipton-Ross has grown to become a recognized name in the national recruitment arena with a reputation for integrity, quality, and excellence in management. The company's mission is to provide cost-effective staffing solutions that allow their clients to maximize the power of their people, enhancing both perspective and productivity.

Industry

Recruiting and staffing services

Company size

51 - 200 Employees

Headquarters location

El Segundo, CA, US

Year founded

1983

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