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Semiconductor Packaging Engineer Jobs in Chicago, IL

Spirax-Sarco Engineering

Technical Sales Engineer

Cary, IL · On-site

$83K - $130K/yr

... packaging, aerospace, defense, and security. Its innovative bespoke solutions - such as ... This position will focus on understanding all aspects of the Semiconductor market including that it ...

Spirax-Sarco Engineering

Technical Sales Engineer

Cary, IL · On-site

$83K - $130K/yr

... packaging, aerospace, defense, and security. Its innovative bespoke solutions - such as ... This position will focus on understanding all aspects of the Semiconductor market including that it ...

Chromalox

Technical Sales Engineer

Cary, IL · On-site

$83K - $130K/yr

... packaging, aerospace, defense, and security. Its innovative bespoke solutions - such as ... This position will focus on understanding all aspects of the Semiconductor market including that it ...

Durex Industries

Technical Sales Engineer

Cary, IL · On-site

$83K - $130K/yr

... packaging, aerospace, defense, and security. Its innovative bespoke solutions - such as ... This position will focus on understanding all aspects of the Semiconductor market including that it ...

Durex Industries

Technical Sales Engineer

Cary, IL · On-site

$83K - $130K/yr

... packaging, aerospace, defense, and security. Its innovative bespoke solutions - such as ... This position will focus on understanding all aspects of the Semiconductor market including that it ...

Chromalox

Technical Sales Engineer

Cary, IL · On-site

$83K - $130K/yr

... packaging, aerospace, defense, and security. Its innovative bespoke solutions - such as ... This position will focus on understanding all aspects of the Semiconductor market including that it ...

Arco Ltd

Senior Wastewater Process Engineer

Chicago, IL · On-site

$135 - $175/hr

... semiconductor, advanced manufacturing, and food & beverage markets. You'll own basis-of-design ... design packages on completed projects. * Hands-on experience with membrane systems (UF/NF/RO ...

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Semiconductor Packaging Engineer information

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How much do semiconductor packaging engineer jobs pay per hour?

As of Aug 19, 2026, the average hourly pay for semiconductor packaging engineer in Chicago, IL is $43.64, according to ZipRecruiter salary data. Most workers in this role earn between $33.65 and $50.77 per hour, depending on experience, location, and employer.

What does a semiconductor packaging engineer do?

A Semiconductor Packaging Engineer is responsible for designing, developing, and implementing the enclosures (or 'packages') that protect semiconductor devices and enable their integration into electronic systems. They work on selecting materials, ensuring thermal management, and optimizing electrical performance while maintaining the integrity and reliability of the chip. These engineers collaborate with cross-functional teams to improve packaging processes and address challenges like miniaturization and high-speed performance. Their work is critical to the performance and durability of modern electronic products.

What are the key skills and qualifications needed to thrive as a semiconductor packaging engineer?

To thrive as a Semiconductor Packaging Engineer, you need a strong background in materials science, mechanical or electrical engineering, and semiconductor manufacturing processes, typically supported by a relevant engineering degree. Proficiency with CAD tools, simulation software (such as ANSYS or COMSOL), and familiarity with industry standards like JEDEC are essential. Critical thinking, problem-solving, and effective teamwork are standout soft skills for this role. These competencies ensure the development of reliable, high-performance semiconductor packages that meet demanding industry requirements.

What are some common challenges semiconductor packaging engineers face in ensuring product reliability?

Semiconductor Packaging Engineers often encounter challenges related to thermal management, material compatibility, and miniaturization. Ensuring that packages effectively dissipate heat while maintaining electrical integrity is critical to product reliability. Additionally, engineers must carefully select materials and design structures that withstand mechanical and environmental stresses, all while meeting increasingly stringent size and performance requirements. Collaboration with design, manufacturing, and quality assurance teams is essential to address these challenges and deliver robust solutions.

What is the difference between Semiconductor Packaging Engineer vs Test Engineer?

AspectSemiconductor Packaging EngineerTest Engineer
Required CredentialsBachelor's in Electrical Engineering, Materials Science, or related fields; certifications like IPC or SEMIBachelor's in Electrical Engineering, Electronics, or related fields; certifications in testing standards
Work EnvironmentDesign labs, manufacturing facilities, cleanroomsTesting labs, production lines, quality assurance departments
Industry UsageSemiconductor manufacturing, electronics companiesElectronics manufacturing, semiconductor companies

Semiconductor Packaging Engineers focus on designing and developing packaging solutions to protect and connect semiconductor devices, while Test Engineers concentrate on testing and validating semiconductor products to ensure quality and performance. Both roles are essential in the semiconductor industry and often collaborate during product development.

What are popular job titles related to Semiconductor Packaging Engineer jobs in Chicago, IL?

For Semiconductor Packaging Engineer jobs in Chicago, IL, the most frequently searched job titles are:

What job categories do people searching Semiconductor Packaging Engineer jobs in Chicago, IL look for?

The top searched job categories for Semiconductor Packaging Engineer jobs in Chicago, IL are:

Semiconductor Packaging Engineer jobs near you
Infographic showing various Semiconductor Packaging Engineer job openings in Chicago, IL as of August 2026, with employment types broken down into 91% Full Time, 5% Part Time, and 4% Contract. Highlights an 86% Physical, 6% Hybrid, and 8% Remote job distribution, with an average salary of $90,776 per year, or $43.6 per hour.

Package & SI/PI - Senior/Staff Packaging Engineer - Electro-Thermal

Eliyan

Mundelein, IL • On-site

Full-time

Re-posted 2 days ago

Job description

Join the leading chiplet interconnect startup! We are seeking an experienced Senior/Staff Packaging Engineer specializing in electro-thermal simulation to join our advanced packaging team. You will develop comprehensive thermal and electrical simulations for next-generation semiconductor packaging solutions, including 2.5D/3D IC integration, chiplet-based systems, and advanced heterogeneous integration technologies. This role is critical in enabling high-performance computing, AI accelerators, and advanced chiplet architectures. We offer a fun work environment with excellent benefits. ONSITE M-F
Key Responsibilities:
  •  Develop detailed thermal models for 2.5D/3D IC packages, chiplets, and multi-die systems; perform steady-state and transient thermal analysis with hotspot identification
  • Execute power integrity (PI) and IR drop analysis; optimize power distribution networks (PDN) and power delivery architectures
  • Conduct electromigration (EM) and reliability analysis for interconnects, bumps, TSVs, and redistribution layers (RDL)
  • Develop chip-package co-simulation workflows using industry-standard EDA tools (ANSYS RedHawk\u0002SC, RHSC-ET, SIwave, Cadence Sigrity/Clarity)
  • Create hierarchical compact macro models (CMM) and reduced-order thermal models for early\u0002stage design optimization
  • Automate simulation workflows using Python, TCL, and Shell scripting; build design space exploration tools
  • Collaborate with silicon design, package design, and manufacturing teams on design-for-reliability (DFR) initiatives
  • Support customer engagements with technical analysis and present findings to stakeholders
Minimum Qualifications:
  •  
Education:
  • PhD in Electrical/Mechanical Engineering, or related field with focus on thermal management, power delivery, or electronic packaging (Master's with 5+ years experience considered)
  • Strong academic background in power integrity, signal integrity, and thermal management for advanced packaging
 
Technical Skills: 
  • Expert proficiency in: ANSYS RedHawk-SC, RHSC Electrothermal, Totem, PathFinder, SIwave, HFSS, Q3D; Cadence Voltus, Sigrity, Clarity; Synopsys RedHawk Fusion, PrimeTime, ICC2
  • Experience with physical design tools (Cadence Innovus, Synopsys ICC2, Siemens Calibre) and RTL\u0002to-GDSII flows
  • Strong programming/scripting: Python, C/C++, Tcl, Shell (bash); Verilog/VHDL/SystemVerilog for verification
  • Knowledge of advanced packaging: 2.5D/3D ICs (CoWoS, InFO, EMIB), chiplets, TSVs, interposers, FOWLP, RDL design
 
Domain Expertise:  
  • Deep understanding of EM/IR analysis, power integrity, thermal physics, and electrothermal co\u0002simulation
  • Expertise in heat transfer principles (conduction, convection, radiation), thermal material properties, and CTE mismatch
  • Knowledge of chiplet standards (UCIe and BoW), die-to-die interfaces, and wafer-scale integration
  • Hands-on experience with semiconductor package thermal/electrical analysis and tape-outs 
Ideal Qualifications:
  • Familiarity with machine learning applications in EDA and design optimization
  • Experience with HPC, AI/ML accelerator packaging, or co-packaged optics (CPO)
  • Background in reliability testing (thermal cycling, HTOL, THB) and measurement correlation
What we are looking for:
  • Strong analytical mindset with expertise across multiple physics domains (thermal, electrical, mechanical)
  • Excellent communication skills to present complex technical concepts to diverse audiences
  • Cross-functional collaboration abilities to work with silicon, package, product, and manufacturing teams
  • Self-motivated professional who thrives in fast-paced environments with minimal supervision
  • Continuous learner staying current with emerging technologies; innovation-driven with creative problem-solving
  • Results-oriented engineer delivering high-quality work to enable product milestones on schedule

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.