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Security Protocol Verification Engineer Jobs (NOW HIRING)

Airspan

UVM SYSTEMVERILOG VERIFICATION ENGINEER

Warren, NJ · On-site

$141K/yr

Airspan Careers UVM SYSTEMVERILOG VERIFICATION ENGINEER Location: Warren, New Jersey, Plano, TX or ... Knowledge of O-RAN architecture and protocols for 4G and 5G networks. * Ability to work ...

Qualcomm

GSoC Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of ... PCIe, Ethernet, or networking protocols * AI/ML accelerator design verification * Security and RAS ...

Baya Systems

Hardware Verification Engineer

Santa Clara, CA

$159K - $195K/yr

DESIGN VERIFICATION ENGINEER SANTA CLARA, CA We are seeking a seasoned Design Verification designer ... Knowledge of Arm AMBA protocols such as AXI, APB, and AHB * Understanding of Arm CHI protocol is a ...

Baya Systems

Hardware Verification Engineer

Austin, TX

$134K - $164K/yr

DESIGN VERIFICATION ENGINEER AUSTIN, TX We are seeking a seasoned Design Verification designer with ... Knowledge of Arm AMBA protocols such as AXI, APB, and AHB * Understanding of Arm CHI protocol is a ...

Retym

ASIC Verification Engineer

Austin, TX · On-site

Experience in data path or data protocols, specifically Ethernet - preferred * Verification using ... Debug the functionality with design engineers. * Perform coverage collection and follow the ...

Axiado

ASIC Verification Engineer

San Jose, CA · On-site

... security, AI driven resilience and efficiency, and real-time platform management. Our technology ... Must have worked on AMBA AXI, AHB, APB protocols * Should have worked on verifying interface ...

Microsoft

Formal Design Verification Engineer

Raleigh, NC · On-site

$132K/yr

... security, interrupts, PCIe, CXL, and/or protocol bridges * Experience driving IP verification for ... Experience applying generative AI to day-to-day tasks Silicon Engineering IC4 - The typical base ...

Ericsson GmbH

IP Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Senior Design Verification Engineer -- ASIC IP Silicon Verification | 5G Infrastructure | Austin ... Protocol expertise - AMBA interfaces (APB, AXI, ACE‑Lite, CHI). * Comfort with Linux, Git, LSF ...

SIGNin Solutions Inc.

Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

Etched Design Verification Engineer 6 Openings Location: San Jose, CA & Austin, TX - onsite Please ... You are comfortable working with standard IP interfaces and protocols such as PCIe, Ethernet, AXI ...

New

Eridu Corporation

Verification Engineer

Saratoga, CA · On-site

$150K/yr

The company is in execution mode and has a world-class engineering team with decades of experience ... Prior experience with Ethernet and PCIe Protocols, Serial and Parallel VIP verification modes and ...

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Security Protocol Verification Engineer information

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How much do security protocol verification engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for security protocol verification engineer in the United States is $152,773.00, according to ZipRecruiter salary data. Most workers in this role earn between $143,000.00 and $158,500.00 per year, depending on experience, location, and employer.

What does a security protocol verification engineer do?

A Security Protocol Verification Engineer is responsible for analyzing and verifying the security of communication protocols used in software and hardware systems. They use formal methods, modeling tools, and testing techniques to identify vulnerabilities, ensure compliance with security standards, and validate the robustness of cryptographic protocols. Their work helps organizations protect sensitive data and maintain secure communication channels. They often collaborate with developers and security researchers to improve overall system security.

What are the key skills and qualifications needed to thrive as a security protocol verification engineer?

To thrive as a Security Protocol Verification Engineer, you need a solid background in computer science, formal verification methods, cryptography, and security protocols, often supported by a relevant degree or equivalent experience. Familiarity with formal verification tools (such as ProVerif, Tamarin, or AVISPA), scripting languages, and knowledge of security standards is typically required. Strong analytical thinking, attention to detail, and effective communication skills help you identify vulnerabilities and clearly convey findings. These skills are crucial for ensuring that complex security protocols are robust against attacks and meet industry compliance standards.

What are some common challenges faced by security protocol verification engineers when analyzing complex protocols?

Security Protocol Verification Engineers often encounter challenges such as modeling intricate protocol behaviors, identifying subtle vulnerabilities, and keeping pace with evolving cryptographic standards. They must thoroughly understand both the formal verification tools and the protocols themselves to accurately simulate real-world attack scenarios. Collaboration with software developers and security architects is crucial to ensure that findings are effectively communicated and integrated into the development lifecycle.

What are popular job titles related to Security Protocol Verification Engineer jobs?

For Security Protocol Verification Engineer jobs, the most frequently searched job titles are:

Infographic showing various Security Protocol Verification Engineer job openings in the United States as of September 2026, with employment types broken down into 85% Full Time, 13% Part Time, and 2% Contract. Highlights an 90% Physical, 2% Hybrid, and 8% Remote job distribution, with an average salary of $152,773 per year, or $73.4 per hour.

UVM SYSTEMVERILOG VERIFICATION ENGINEER

Warren, NJ • On-site

Airspan
See more jobs at Airspanexternal

$141K/yr

Full-time

Re-posted 3 days ago

Job description

Airspan Careers
UVM SYSTEMVERILOG VERIFICATION ENGINEER
Location: Warren, New Jersey, Plano, TX or REMOTE U.S.
Company: AirSpan Networks
About AirSpan
AirSpan Networks is a global provider of innovative 4G and 5G network solutions, enabling efficient and cost-effective connectivity for operators, enterprises, and industrial applications. We are looking for a skilled UVM SystemVerilog Verification Engineer to join our dynamic team and contribute to the validation and testing of our cutting-edge communication technologies.
Job Description
As a UVM Verification Engineer, you will be responsible for developing and executing test plans using Universal Verification Methodology (UVM) to validate the functionality, performance, and reliability of AirSpan's ASIC and FPGA designs. You will work closely with design and development teams to ensure compliance with specifications and industry standards.
Key Responsibilities
  • Develop and implement UVM-based verification plans and test strategies for FPGA designs.
  • Perform functional, system-level, and regression testing for digital hardware components.
  • Create test benches, test cases, and automation frameworks in System Verilog.
  • Analyze test results, debug issues, and collaborate with design teams to resolve defects.
  • Ensure compliance with industry standards and customer requirements.
  • Provide documentation and reports on test procedures, results, and defect tracking.
  • Continuously optimize test processes and tools to improve efficiency and accuracy.

Qualifications & Experience
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related fields.
  • 10 years of experience in UVM-based verification of FPGA systems.
  • Strong understanding of SystemVerilog and Universal Verification Methodology (UVM).
  • Proficiency in scripting languages such as Python or Perl for automation.
  • Experience with simulation tools such as ModelSim or QuestaSim.
  • Experience with C/C++
  • Experience in implementing Bit Accurate Models and debugging DSP designs
  • Familiarity with debugging tools, coverage metrics, and formal verification techniques.
  • Strong problem-solving and analytical skills with attention to detail.
  • Knowledge of O-RAN architecture and protocols for 4G and 5G networks.
  • Ability to work collaboratively in a fast-paced, cross-functional team environment.
  • Design experience a plus.

Preferred Skills
  • Experience in verification of communication protocols.
  • Knowledge of FPGA development and hardware description languages such as VHDL/Verilog.
  • Understanding of hardware/software co-verification techniques.

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