FPGA Design Engineers are responsible for the efficient implementation of novel signal processing ... R&D. These are exciting projects aimed at addressing challenging real-world communication needs.
FPGA Design Engineers are responsible for the efficient implementation of novel signal processing ... R&D. These are exciting projects aimed at addressing challenging real-world communication needs.
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JOB SUMMARY: The R + D Quality Engineer III leads and enforces product development quality ... Facilitates the design and process failure mode and effects analysis (FMEA) process. * Leads site ...
R+D Quality Engineer III
Versailles, OH · On-site
$66K - $86K/yr
JOB SUMMARY: The R + D Quality Engineer III leads and enforces product development quality ... Facilitates the design and process failure mode and effects analysis (FMEA) process. * Leads site ...
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Albany, NY · On-site
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Albany, NY · On-site
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This opportunity offers the chance to work closely with engineering and technology teams to develop new products, improve manufacturing processes, and support innovation from concept through ...
Quick apply
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The R+D team is cross functional, and works closely with Embedded Software Engineers, Mechanical ... Electronic design; - * Digital circuit design including components such as Microprocessors, DSP ...
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FPGA Design Engineers are responsible for the efficient implementation of novel signal processing ... R&D. These are exciting projects targeted to address challenging real-world communication needs.
FPGA Design Engineer
Los Angeles, CA · On-site
$100K - $140K/yr
FPGA Design Engineers are responsible for the efficient implementation of novel signal processing ... R&D. These are exciting projects targeted to address challenging real-world communication needs.
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FPGA Design Engineers are responsible for the efficient implementation of novel signal processing ... R&D. These are exciting projects aimed at addressing challenging real-world communication needs.
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Quick apply
Be Seen First
Mechanical Design Engineer
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Los Angeles, CA · Hybrid
$132K - $182K/yr
FPGA Design Engineers are responsible for the efficient implementation of novel signal processing ... R&D. These are exciting projects targeted to address challenging real-world communication needs.
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Los Angeles, CA · Hybrid
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Senior R & D Engineer, Electrical Engineering
San Diego, CA · On-site
$140K - $200K/yr
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San Diego, CA · On-site
$140 - $200/hr
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Senior R & D Engineer, Electrical Engineering
San Diego, CA · On-site
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$135K - $163K/yr
Proficiency in SolidWorks 3-D design software or equivalent and experience performing Finite Element Analysis * Able to apply engineering principles to develop component and simple system designs to ...
$135K - $163K/yr
Proficiency in SolidWorks 3-D design software or equivalent and experience performing Finite Element Analysis * Able to apply engineering principles to develop component and simple system designs to ...
Process Engineer R & D
West Chicago, IL · On-site
$78K - $100K/yr
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Process Engineer R & D
West Chicago, IL · On-site
$78K - $100K/yr
Design, execute, and document plant trials, including clear hypotheses, success criteria, and ... Bachelor's degree in chemical engineering, Manufacturing Engineering, Industrial Engineering or ...
Process Engineer R & D
$78K - $100K/yr
Design, execute, and document plant trials, including clear hypotheses, success criteria, and ... Bachelor's degree in chemical engineering, Manufacturing Engineering, Industrial Engineering or ...
Process Engineer R & D
$78K - $100K/yr
Design, execute, and document plant trials, including clear hypotheses, success criteria, and ... Bachelor's degree in chemical engineering, Manufacturing Engineering, Industrial Engineering or ...
Seasonal R D Design Engineer information
See salary details
$20.91 - $26.92
2% of jobs
$26.92 - $32.93
2% of jobs
$32.93 - $38.94
13% of jobs
$42.29 is the 25th percentile. Wages below this are outliers.
$38.94 - $44.95
14% of jobs
$44.95 - $50.96
15% of jobs
$50.96 - $56.97
2% of jobs
The median wage is $57.87 / hr.
$56.97 - $62.98
11% of jobs
$62.98 - $68.99
13% of jobs
$70.64 is the 75th percentile. Wages above this are outliers.
$68.99 - $75
11% of jobs
$75 - $81.01
13% of jobs
$81.01 - $87.02
4% of jobs
$20
$57
$87
How much do seasonal r&d design engineer jobs pay per hour?
$132K - $181K/yr
Full-time
Re-posted 25 days ago
Job description
THE OPPORTUNITY
Silvus is seeking a Principal FPGA / RTL Design Engineer- Signal Processing who will report to the Senior Engineering Director in Irvine and work closely with the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D. These are exciting projects aimed at addressing challenging real-world communication needs.
This Principal FPGA / RTL Design Engineer is 100% onsite, Monday through Friday, at Silvus Technologies' Engineering and R&D Office in Irvine, CA, near the vibrant Irvine Spectrum.
The following is a list of at least some of the current essential job functions of the position. Management may assign or reassign duties and responsibilities at any time at its discretion.
ROLE AND RESPONSIBILITIES
- Working with system engineers and digital design architecting for wireless communication projects, including fixed point design of signal processing blocks.
- RTL coding, simulation, and test bench development.
- FPGA synthesis and timing closure.
- Hardware verification and troubleshooting; familiarity with logic analyzers.
- Provide support to the RF and Software Engineering teams.
REQUIRED QUALIFICATIONS
- Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields.
- Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields.
- Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs.
- Deep knowledge of RTL design fundamentals using Verilog and System-Verilog.
- Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or high-utilization FPGA designs.
- Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
- Must be a U.S. Citizen due to clients under U.S. government contracts.
- All employment is contingent upon the successful clearance of a background check and drug testing..
PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES
- MS. or Ph.D. degree in Electrical Engineering, Computer Science, or relevant fields.
- Basic MATLAB skills.
- Solid knowledge and understanding of scripting languages such as Perl and Python.
- Strong communication and presentation skills.
- Experience with wireless communication systems on FPGA or ASIC designs.
WORKING CONDITIONS & PHYSICAL REQUIREMENTS
- Office environment.
- Occasional exposure to heat, cold, and allergens while performing tests or demonstrations in the field.
- While performing the duties of this job, the employee is required to do the following:
- Lift equipment up to 20 lbs. for the set-up of demonstrations and testing.
- Perform bending and reaching movements to place items on lower and higher shelves.
- Kneeling or squatting to access lower shelves.
- Walking/Moving in the labs
About SILVUS TECHNOLOGIES
Sourced by ZipRecruiter
Industry
Wireless telecommunications carriers
Company size
51 - 200 Employees
Headquarters location
Los Angeles, CA, US
Year founded
2004