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Job Details:Job Description: 

Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Role Impact:
As a Formal Verification Engineer, you will play a pivotal role in ensuring the quality and reliability of Intel's cutting-edge CPU technologies. Working as part of the CPU team, you will leverage formal verification methodologies to develop, implement, and validate the next generation of high-performance CPUs that power a variety of innovative devices, from laptops to AI and machine learning systems. In this role, you will directly impact Intel's ability to deliver world-class products that enrich the lives of people across the globe. Join us and help engineer the future at Intel.

Key Responsibilities:

• Conducts verification of IP and/or SoC microarchitecture using formal verification tools, methodologies, and technologies based on model checking and equivalence checking algorithms.
• Creates comprehensive formal verification test and coverage plans including definition of formal verification scope, strategy, and techniques.
• Creates abstraction models for convergence on the design, carves out the right boundaries for the design, and tracks, verifies, and applies abstraction techniques.
• Develops formal proofs to implement the verification plan, reviews the completed proofs, and develops new formal verification methodologies.
• Performs convergence on design by creating formal verification methodology, abstraction, and simulation techniques.
• Finds and implements corrective measures to resolve failing tests.
• Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology.
• Understands the binary decision diagram (BDD) and data flow graph (DFG) for data paths and resolves the BDD complexity on arithmetic.
• Applies understanding of modeling architecture to simplify and model the problem and uses tools to formally prove protocols and architectures.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.

Minimum Qualifications:

You must possess a B.S. in Computer Engineering or Electrical Engineering with 3+ years of experience listed below, or a M.S. in Computer Engineering or Electrical Engineering with 2+ years of experience listed below, or a PhD in Computer Engineering or Electrical Engineering with emphasis on formal verification in the following areas:

The experience must include the following areas:

• Experience with applying sequential equivalence checking in complex micro-architectures.
• Experience in assertion writing, checker development, coverage analysis, failure debug, root cause analysis.

Experience in 3 or more the following areas:

• In-depth computer architecture knowledge with emphasis on out of order processor execution, memory hierarchy, and memory management.
• Hands on experience with industry standard formal verification tools such as JasperGold, Questa Formal, VC Formal.
• Experience with formal abstractions and other complexity reduction techniques.
• Experience with a hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools.
• Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc.
• Intel or industry experience in pre-silicon verification of CPU cores, including specific areas of technical ownership/expertise relevant to CPUs.

Preferred Qualifications:

• Knowledge of Intel Architecture ISA and system architecture, x86 assembly language.
• Post-silicon debug and analysis.
• Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, AustinBusiness group:Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.