Logic Design Engineer
Santa Clara, CA · On-site
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Develop Verilog RTL and Functional Behavioral Models * Drive/develop ASIC design flows and scripts
Santa Clara, CA · On-site
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Develop Verilog RTL and Functional Behavioral Models * Drive/develop ASIC design flows and scripts
Santa Clara, CA · On-site
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Develop Verilog RTL and Functional Behavioral Models * Drive/develop ASIC design flows and scripts
We are searching for a dedicated engineer to join our exciting team of problem solvers. Description ... Verilog RTL Logic Design experience.
We are searching for a dedicated engineer to join our exciting team of problem solvers. Description ... Verilog RTL Logic Design experience.
Phoenix, AZ · On-site
$141K - $269K/yr
As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL ...
Phoenix, AZ · On-site
$141K - $269K/yr
As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL ...
Santa Clara, CA · On-site
$145K/yr
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Develop Verilog RTL and Functional Behavioral Models * Drive/develop ASIC design flows and scripts
Santa Clara, CA · On-site
$145K/yr
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Develop Verilog RTL and Functional Behavioral Models * Drive/develop ASIC design flows and scripts
Hillsboro, OR · Hybrid
$127K - $236K/yr
As a Principal Logic Design Engineer , you will play a pivotal role in the micro-architecture and ... Own micro-architecture definition and RTL design for critical blocks such as schedulers, command ...
Hillsboro, OR · Hybrid
$127K - $236K/yr
As a Principal Logic Design Engineer , you will play a pivotal role in the micro-architecture and ... Own micro-architecture definition and RTL design for critical blocks such as schedulers, command ...
San Jose, CA · On-site
$117K - $160K/yr
AI System Engineer Office Location: San Jose, CA Job Type: Full-Time Work Model: Onsite Job Summary ... Responsible for logic design/Register-Transfer Level (RTL) entry, design quality (LINT, CDC, RDC ...
San Jose, CA · On-site
$117K - $160K/yr
AI System Engineer Office Location: San Jose, CA Job Type: Full-Time Work Model: Onsite Job Summary ... Responsible for logic design/Register-Transfer Level (RTL) entry, design quality (LINT, CDC, RDC ...
Hillsboro, OR · On-site
$127K - $236K/yr
As a Principal Logic Design Engineer , you will play a pivotal role in the micro-architecture and ... Own micro-architecture definition and RTL design for critical blocks such as schedulers, command ...
Hillsboro, OR · On-site
$127K - $236K/yr
As a Principal Logic Design Engineer , you will play a pivotal role in the micro-architecture and ... Own micro-architecture definition and RTL design for critical blocks such as schedulers, command ...
Austin, TX · On-site
$127K - $190K/yr
... focused engineer to contribute to the next generation of microarchitecture and logic for the ... Drive RTL design in SystemVerilog, owning features from concept through tape-out. * Perform early ...
Austin, TX · On-site
$127K - $190K/yr
... focused engineer to contribute to the next generation of microarchitecture and logic for the ... Drive RTL design in SystemVerilog, owning features from concept through tape-out. * Perform early ...
Experience in logic design and static verification (SystemVerilog, Verilog, or VHDL). * Strong background in RTL/logic design. * Programming skills in Perl, Python, and TCL. ACADEMIC CREDENTIALS:
Experience in logic design and static verification (SystemVerilog, Verilog, or VHDL). * Strong background in RTL/logic design. * Programming skills in Perl, Python, and TCL. ACADEMIC CREDENTIALS:
Santa Clara, CA · Hybrid
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Develop Verilog RTL and Functional Behavioral Models * Drive/develop ASIC design flows and scripts
Santa Clara, CA · Hybrid
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Develop Verilog RTL and Functional Behavioral Models * Drive/develop ASIC design flows and scripts
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
We are now looking for a Senior Logic Design Engineer. As a member of our CPU Logic Design Team ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
We are now looking for a Senior Logic Design Engineer. As a member of our CPU Logic Design Team ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
Bachelor's degree in electrical or computer engineering or related field * 7+ years of experience in Logic (RTL) Design Preferred Qualifications: * Great communication, collaboration and teamwork ...
Quick apply
Bachelor's degree in electrical or computer engineering or related field * 7+ years of experience in Logic (RTL) Design Preferred Qualifications: * Great communication, collaboration and teamwork ...
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
Hillsboro, OR · On-site
Optimize logic designs to meet power, performance, area, and timing goals. * Collaborate on ... engineers, and grow your skills in RTL design, processor architecture, and semiconductor ...
Hillsboro, OR · On-site
Optimize logic designs to meet power, performance, area, and timing goals. * Collaborate on ... engineers, and grow your skills in RTL design, processor architecture, and semiconductor ...
Hillsboro, OR · On-site
$150 - $200/hr
As a Principal Logic Design Engineer , youwill play a pivotal role inthemicro-architecture ... Ownmicro-architecturedefinitionand RTL designfor critical blocks such as schedulers, command ...
Hillsboro, OR · On-site
$150 - $200/hr
As a Principal Logic Design Engineer , youwill play a pivotal role inthemicro-architecture ... Ownmicro-architecturedefinitionand RTL designfor critical blocks such as schedulers, command ...
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
Orlando, FL · On-site
... Engineer, you will participate in micro-architecture specification and RTL coding. Explore ... Knowledge of logic design fundamentals * Knowledge of computer architecture fundamentals
Orlando, FL · On-site
... Engineer, you will participate in micro-architecture specification and RTL coding. Explore ... Knowledge of logic design fundamentals * Knowledge of computer architecture fundamentals
We are now looking for a Senior Logic Design Engineer. As a member of our CPU Logic Design Team ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
We are now looking for a Senior Logic Design Engineer. As a member of our CPU Logic Design Team ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
Orlando, FL · On-site
... Engineer, you will participate in micro-architecture specification and RTL coding. Explore ... Preferred Qualifications Knowledge of logic design fundamentals Knowledge of computer architecture ...
Orlando, FL · On-site
... Engineer, you will participate in micro-architecture specification and RTL coding. Explore ... Preferred Qualifications Knowledge of logic design fundamentals Knowledge of computer architecture ...
$40.5K - $51.2K
2% of jobs
$51.2K - $62K
11% of jobs
$67.7K is the 25th percentile. Wages below this are outliers.
$62K - $72.7K
23% of jobs
The median wage is $79.6K / yr.
$72.7K - $83.4K
22% of jobs
$83.4K - $94.1K
17% of jobs
$94.4K is the 75th percentile. Wages above this are outliers.
$94.1K - $104.9K
9% of jobs
$104.9K - $115.6K
6% of jobs
$115.6K - $126.3K
3% of jobs
$126.3K - $137K
3% of jobs
$137K - $147.8K
2% of jobs
$147.8K - $158.5K
1% of jobs
$40.5K
$88.2K
$158.5K
For Rtl Logic Design Engineer jobs, the most frequently searched job titles are:

Santa Clara, CA • On-site
Other
Re-posted 16 days ago
8.6
Based on 13 frontline employees who took The Breakroom Quiz
28th of 162 rated electronics manufacturers
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.
Together, we advance your career.
THE ROLE:We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed-signal high-speed IO team. As a key contributor, you will be part of a leading team that drives and improves AMD's ability to deliver the highest quality, industry-leading technologies to the market. The Design Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
THE PERSON:The successful candidate will possess excellent analytical and critical thinking skills with strong attention to detail, demonstrate the initiative and ability to independently drive tasks to successful completion, and communicate effectively across teams and stakeholders. They will bring a collaborative, team-first mindset, contribute positively to a fast-paced environment, and have the ability to mentor and guide junior engineers, fostering both technical growth and team success.
KEY RESPONSIBILITIES:Santa Clara, CA
#LI-PA1
#LI-Hybrid
This role is not eligible for visa sponsorship.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
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Computer and electronic product manufacturing and manufacturing
5,001 - 10,000 Employees
Sunnyvale, CA, US