ZipRecruiter

Log In

1

Rfic Lead Jobs (NOW HIRING)

Tacit

RFIC Silicon Lead

San Francisco, CA · On-site

$180K - $230K/yr

The rare skill we are looking for is not generic RFIC execution. It is the ability to reason across ... Strong communication skills and ability to lead technical decisions in a small, fast-moving team ...

Tacit

RFIC Silicon Lead

San Francisco, CA · On-site

The rare skill we are looking for is not generic RFIC execution. It is the ability to reason across ... Strong communication skills and ability to lead technical decisions in a small, fast‑moving team ...

Roguebeam

Sr. RFIC Engineer

Seattle, WA · On-site

$119K - $163K/yr

The Role We're looking for a Senior RFIC Engineer to lead the design of advanced beamformer integrated circuits at the heart of our phased array solutions. You'll take ownership of significant blocks ...

Roguebeam

Principal RFIC Engineer

Seattle, WA · On-site

Define RFIC architectures and lead the most complex and ambiguous design challenges * Set technical direction across the RFIC roadmap and influence system-level trade-offs * Establish design flows ...

SkyGig

RFIC Design Intern

San Jose, CA

... the lead and ownership of a well-defined project. They should also be excited to adapt, learn ... Proficient in RFIC design and characterization tools such as Cadence Virtuoso, Spectre RF, ADS, or ...

SkyGig

RFIC Design Intern

San Jose, CA · On-site

... the lead and ownership of a well-defined project. They should also be excited to adapt, learn ... Proficient in RFIC design and characterization tools such as Cadence Virtuoso, Spectre RF, ADS, or ...

Falcomm

Senior RFIC Reliability Engineer

Atlanta, GA · On-site

Falcomm is seeking an RFIC Reliability Engineer to lead reliability analysis and qualification activities for RF integrated circuits and semiconductor products. This role will focus on evaluating ...

Falcomm

Senior RFIC Reliability Engineer

Atlanta, GA · On-site

Falcomm is seeking an RFIC Reliability Engineer to lead reliability analysis and qualification activities for RF integrated circuits and semiconductor products. This role will focus on evaluating ...

Falcomm

Senior RFIC Reliability Engineer

Atlanta, GA · On-site

Falcomm is seeking an RFIC Reliability Engineer to lead reliability analysis and qualification activities for RF integrated circuits and semiconductor products. This role will focus on evaluating ...

SpaceX

RFIC Layout Designer (RFIC Engineering)

Irvine, CA · On-site

$120K - $170K/yr

You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...

SpaceX

RFIC Layout Designer (RFIC Engineering)

Redmond, WA · On-site

$120K - $175K/yr

You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...

SpaceX

RFIC Layout Designer (RFIC Engineering)

Irvine, CA · On-site

$120K - $170K/yr

You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...

Amazon

RFIC Design Engineer , Amazon Leo

Sunnyvale, CA · On-site

Lead implementation of area/power-efficient RFIC chips with multiple transceiver chains with integrated PLLs from concept to production. Work closely with packaging/HW/EE/FW teams to ensure seamless ...

next page

Showing results 1-20

All JobsManufacturing JobsProduct Manufacturing JobsMechanical Engineer JobsRfic Lead Jobs

Rfic Lead information

What are popular job titles related to Rfic Lead jobs?

For Rfic Lead jobs, the most frequently searched job titles are:

Infographic showing various Rfic Lead job openings in the United States as of August 2026, with employment types broken down into 87% Full Time, 10% Part Time, and 3% Contract. Highlights an 91% Physical, 3% Hybrid, and 6% Remote job distribution.

RFIC Silicon Lead

San Francisco, CA • On-site

Tacit
See more jobs at Tacitexternal

$180K - $230K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 23 days ago

Job description

About Tacit
We are an early-stage, deep tech startup based in San Francisco, developing innovative hardware that rethinks human-computer interaction. We are backed by General Catalyst, Khosla Ventures, and Greylock Partners, with a founding team from Stanford, BrainGate, Oculus, and Tesla. While we can't reveal too much just yet, our team is tackling cutting-edge engineering challenges to bring revolutionary products to life.
About the role
We are building CMOS RF systems at ultra low-power envelopes. We are looking for our first silicon hire: the person who will define the RF CMOS architecture, translate Tacit's sensing and ML constraints into circuit reality, and set the technical foundation for everything that follows.
This role starts hands-on. You will work at the transistor level, stand up the initial design environment, evaluate process options, simulate and design critical blocks, and drive early silicon decisions. But the most important responsibility is architectural judgment: determining what RF front-end, synthesizer, power-management, and duty-cycling approaches can actually close in CMOS at our target power envelopes.
The rare skill we are looking for is not generic RFIC execution. It is the ability to reason across system architecture, low-power CMOS RF, frequency generation, sensing constraints, form factor, and product requirements - and to know when a proposed path will or will not work in silicon.
As the program matures, you will help decide what stays internal and what is executed with external silicon partners. You may directly own blocks, technically direct contractors, or build the internal team. In all cases, the architecture-defining IP and technical judgment must live inside Tacit.
What you'll do
  • Define the RF CMOS architecture for an ultra-low-power, frequency-agile sensing front end
  • Translate system-level sensing, ML, and form-factor constraints into circuit-level requirements
  • Design and/or technically direct critical RF circuit blocks, including VCOs, PLLs, mixers, LNAs, buffers, passives, clocking, biasing, and power-management structures
  • Architect fast-settling frequency generation and hopping approaches suitable for aggressive duty-cycled operation
  • Drive power-reduction methodology across the RF system: duty-cycle co-design, supply gating, bias trimming, wake/sleep transients, and system-level power tradeoffs
  • Evaluate and recommend CMOS process options for a low-power wideband / frequency-agile SoC, including tradeoffs across 28nm, 22FDX, 55nm RF, and related nodes
  • Stand up and operate the early RFIC design environment, including Cadence Virtuoso, Spectre, ADE, EM simulation, Calibre, and PDK flows
  • Identify when an architecture will not close in silicon, and propose practical relaxations or alternatives
  • Own or technically direct implementation through DRC/LVS, tape-out, packaging, bring-up, measurement correlation, and iteration
  • Evaluate, select, and technically manage external silicon partners where appropriate, while keeping architecture-defining IP and technical judgment inside Tacit
  • Help build the future silicon team as the architecture, program, and company scale
Requirements
  • MS or PhD in electrical engineering, or equivalent experience
  • 10+ years in RFIC design, with substantial industry experience delivering silicon
  • Deep experience in low-power CMOS RF, synthesizers, radar, UWB, frequency-agile radios, or related sensing systems
  • Strong transistor-level design ability in Cadence Virtuoso, Spectre, and ADE
  • Expertise in synthesizer and RF front-end circuits, especially VCOs, PLLs, mixers, LNAs, buffers, passives, clocking, and biasing
  • Strong understanding of CMOS process tradeoffs, device behavior, stack selection, parasitics, layout effects, and RF process-node selection
  • Experience with EM simulation tools such as EMX, HFSS, Momentum, or equivalent
  • Track record taking RFIC blocks or systems from architecture through silicon validation
  • Ability to reason across architecture, circuits, layout, packaging, measurement, power, and product constraints
  • Ability to translate ambiguous system-level goals into concrete circuit and silicon tradeoffs
  • Strong communication skills and ability to lead technical decisions in a small, fast-moving team
Strong candidates may have
  • Background in low-power radar, UWB, frequency synthesizers, or frequency-agile sensing front ends
  • Experience with fast-settling PLLs, wideband frequency generation, duty-cycled RF systems, or ultra-low-power sensing radios
  • Experience with 28nm, 22FDX, 55nm RF, or other RF-capable CMOS processes
  • Experience as a first or early silicon hire at a startup
  • Experience managing external design houses, foundries, packaging vendors, or semiconductor supply-chain partners
  • Experience with RF/analog/digital co-design and system-level power optimization
  • Experience building, hiring, or mentoring RFIC teams
  • Strategic mindset: engineering decisions framed in terms of business outcomes, product milestones, defensible IP, and time-to-market

Compensation Range
$180,000 - $230,000/year plus meaningful equity package
Benefits
  • Competitive equity package
  • Comprehensive medical, dental, and vision insurance
  • Company size: 30-50 people
  • Unlimited PTO
  • Visa sponsorship
  • 4% 401k matching

Apply