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Rfic Design Engineer Jobs in California (NOW HIRING)

We are seeking a motivated RFIC Design Engineer Intern to support the development, simulation, and validation of RF integrated circuits for next-generation wireless and satellite communications ...

We are seeking a motivated RFIC Design Engineer Intern to support the development, simulation, and validation of RF integrated circuits for next-generation wireless and satellite communications ...

Description As a RFIC Design Engineer, you are going to be responsible for providing RFIC solutions for wireless SoC and driving them to mass production for Apple's Wireless Connectivity products.

As an RFIC Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group, giving to Apple's groundbreaking wireless connectivity solutions into hundreds of ...

As an RFIC Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group, giving to Apple's groundbreaking wireless connectivity solutions into hundreds of ...

As an RFIC Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group, giving to Apple's groundbreaking wireless connectivity solutions into hundreds of ...

As an RFIC Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group, giving to Apple's groundbreaking wireless connectivity solutions into hundreds of ...

As an RFIC Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group, giving to Apple's groundbreaking wireless connectivity solutions into hundreds of ...

Description As a RFIC Design Engineer, you are going to be responsible for providing RFIC solutions for wireless SoC and driving them to mass production for Apple's Wireless Connectivity products.

Description As a RFIC Design Engineer, you are going to be responsible for providing RFIC solutions for wireless SoC and driving them to mass production for Apple's Wireless Connectivity products.

Description As a RFIC Design Engineer, you are going to be responsible for providing RFIC solutions for wireless SoC and driving them to mass production for Apple's Wireless Connectivity products.

Engineering Group, Engineering Group > RFIC Design General Summary: Define, design and develop complex radio frequency integrated circuits in complex SoC's and discrete RFIC's. Perform radio signal ...

RFIC DESIGN ENGINEER (RFIC ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink ...

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Rfic Design Engineer information

See California salary details

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$50

$72

How much do rfic design engineer jobs pay per hour?

As of Jul 16, 2026, the average hourly pay for rfic design engineer in California is $50.03, according to ZipRecruiter salary data. Most workers in this role earn between $38.65 and $60.96 per hour, depending on experience, location, and employer.

What are the typical daily responsibilities of an RFIC Design Engineer?

As an RFIC Design Engineer, your typical day involves designing, simulating, and verifying radio frequency integrated circuits used in products such as wireless devices and communication systems. You’ll collaborate closely with fellow design engineers, layout teams, and testing engineers to ensure circuits meet required specifications and performance standards. Regular activities include schematic capture, layout reviews, analyzing simulation results, and participating in design reviews. This role often requires a balance between hands-on technical work and communication within a multidisciplinary engineering team.

What are the key skills and qualifications needed to thrive in the Rfic Design Engineer position, and why are they important?

To thrive as an RFIC Design Engineer, you need a solid background in electrical engineering, expertise in RF circuit design, and experience with semiconductor technologies, typically supported by a relevant degree. Familiarity with tools such as Cadence Virtuoso, ADS, and knowledge of industry standards are essential, and certifications like IEEE or advanced degrees can be beneficial. Strong problem-solving skills, attention to detail, and clear communication are important soft skills for collaborating in cross-functional teams. These competencies ensure successful design and implementation of high-performance RF integrated circuits, which are critical to developing advanced wireless communication systems.

What is an RFIC Design Engineer job?

An RFIC (Radio Frequency Integrated Circuit) Design Engineer is responsible for designing, simulating, and testing RF circuits used in wireless communication systems. They work with technologies like CMOS, SiGe, and GaAs to develop components such as amplifiers, mixers, and oscillators. Their role involves circuit design, layout, electromagnetic simulations, and validation to ensure performance meets industry standards. RFIC Design Engineers collaborate with cross-functional teams, including system engineers and layout designers, to optimize performance and manufacturability.

What are the most commonly searched types of Rfic Design Engineer jobs in California? The most popular types of Rfic Design Engineer jobs in California are:
What are popular job titles related to Rfic Design Engineer jobs in California? For Rfic Design Engineer jobs in California, the most frequently searched job titles are:
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Full-time

Posted 17 days ago


Job description

We are seeking a motivated RFIC Design Engineer Intern to support the development, simulation, and validation of RF integrated circuits for next-generation wireless and satellite communications applications. This internship is ideal for a student with strong fundamentals in analog/RF circuit design who wants hands-on experience working with experienced RFIC engineers on real product development and help push new hardware innovations forward.

Responsibilities

As an RFIC Design Engineer Intern, you will:

  • Assist with the design and simulation of RF/analog front-end circuit blocks such as LNAs, mixers, oscillators, PLLs, PAs, VGAs, switches, etc.
  • Perform circuit RF simulations including S-parameters, noise figure, gain, linearity, stability, power consumption, etc.
  • Support layout reviews, parasitic extraction, and post-layout simulations.
  • Assist in the analysis of 2.5D and 3D EM circuit models and simulation outcomes.
  • Work across a cross-functional collaborative team of bright RF engineers.
  • Prepare technical documents and reports, and participate in design reviews and brainstorming sessions.

We are considering full-time/ part-time applicants for Fall 2026.

The ideal candidate will have strong technical competency, curiosity, and the ability to take the lead and ownership of a well-defined project. They should also be excited to adapt, learn quickly, and grow in a fast-paced startup environment.

Requirements

  • Currently pursuing a M.S., or Ph.D. in Electrical Engineering with 2+ years of RFIC design experience.
  • Strong background in RF state-of-the-art CMOS, SOI, or SiGe technologies
  • Proficient in RFIC design and characterization tools such as Cadence Virtuoso, Spectre RF, ADS, or similar.
  • Deep understanding of system specifications and capable of translating system requirements into circuit requirements at IC level.
  • Experience with RFIC layout and post-layout simulation.
  • Experience with Python, MATLAB, or scripting for data analysis and automation.
  • Prior research, or tapeout experience in RF/analog IC design.
  • Comfortable working and solving problems independently as well as collaboratively within a team.
  • Strong written and oral communication skills in English and comfortable explaining technical concepts to the rest of the team.

Benefits

  • Paid, full-time, onsite internship at our Bay Area, CA location with competitive salary
  • Opportunity to work with a collaborative and ambitious team developing disruptive products.
  • Opportunities for growth, leadership, and project ownership in a dynamic startup environment.