The EDA engineer will be a significant technical contributor to a broad array of IC development ... to remote location. Major Area of Accountability: * Development,verification, and release of PDK ...
The EDA engineer will be a significant technical contributor to a broad array of IC development ... to remote location. Major Area of Accountability: * Development,verification, and release of PDK ...
Senior Staff Design Automation Engineer
Minneapolis, MN · On-site +1
$108K - $142K/yr
The position is based at our HQ site in Bloomington, MN, with consideration available for remote ... Utilize SkyWater PDK's and provide feedback to internal teams on issues, improvements, capabilities ...
New
Senior Staff Design Automation Engineer
Minneapolis, MN · On-site +1
$108K - $142K/yr
The position is based at our HQ site in Bloomington, MN, with consideration available for remote ... Utilize SkyWater PDK's and provide feedback to internal teams on issues, improvements, capabilities ...
New
Product Engineer, Custom
Cambridge, MA · On-site +1
$90K - $180K/yr
Manage MPW schedules, PDK, and deliverables * Assist customers with PDK usage, layout reviews, DRC ... Flexible hybrid or remote work and vacation policies. * Commuter Benefits and Subsidy.
Product Engineer, Custom
Cambridge, MA · On-site +1
$90K - $180K/yr
Manage MPW schedules, PDK, and deliverables * Assist customers with PDK usage, layout reviews, DRC ... Flexible hybrid or remote work and vacation policies. * Commuter Benefits and Subsidy.
Layout Principal Designer
Minneapolis, MN · On-site +1
The position is based at our HQ site in Bloomington, MN, with consideration available for remote ... Engineering, Microelectronics or related fields. Preferred Qualifications: * Background in PDK ...
Layout Principal Designer
Minneapolis, MN · On-site +1
The position is based at our HQ site in Bloomington, MN, with consideration available for remote ... Engineering, Microelectronics or related fields. Preferred Qualifications: * Background in PDK ...
High-Speed Analog Layout Design Engineer
Austin, TX · On-site +1
$200K/yr
Irvine, CA or San Jose, CA or remote + travel to Irvine, CA About the Role Celero Communication Inc ... You will interface closely with circuit designers, CAD/PDK teams, and other layout engineers to ...
Quick apply
High-Speed Analog Layout Design Engineer
Austin, TX · On-site +1
$200K/yr
Irvine, CA or San Jose, CA or remote + travel to Irvine, CA About the Role Celero Communication Inc ... You will interface closely with circuit designers, CAD/PDK teams, and other layout engineers to ...
High-Speed Analog Layout Design Engineer
Irvine, CA · On-site +1
$217K/yr
Irvine, CA or San Jose, CA or remote About the Role Celero Communication Inc. is an exciting and ... You will interface closely with circuit designers, CAD/PDK teams, and other layout engineers to ...
Quick apply
High-Speed Analog Layout Design Engineer
Irvine, CA · On-site +1
$217K/yr
Irvine, CA or San Jose, CA or remote About the Role Celero Communication Inc. is an exciting and ... You will interface closely with circuit designers, CAD/PDK teams, and other layout engineers to ...
High-Speed Analog Layout Design Engineer
San Jose, CA · On-site +1
$239K/yr
Irvine, CA or San Jose, CA or remote About the Role Celero Communication Inc. is an exciting and ... You will interface closely with circuit designers, CAD/PDK teams, and other layout engineers to ...
Quick apply
High-Speed Analog Layout Design Engineer
San Jose, CA · On-site +1
$239K/yr
Irvine, CA or San Jose, CA or remote About the Role Celero Communication Inc. is an exciting and ... You will interface closely with circuit designers, CAD/PDK teams, and other layout engineers to ...
Remote Pdk Engineer information
See salary details
$38K - $52K
5% of jobs
$52K - $65.9K
7% of jobs
$65.9K - $79.9K
9% of jobs
$82.8K is the 25th percentile. Wages below this are outliers.
$79.9K - $93.8K
14% of jobs
The median wage is $106.4K / yr.
$93.8K - $107.8K
16% of jobs
$107.8K - $121.7K
13% of jobs
$121.7K - $135.7K
6% of jobs
$143.1K is the 75th percentile. Wages above this are outliers.
$135.7K - $149.6K
8% of jobs
$149.6K - $163.6K
8% of jobs
$163.6K - $177.5K
7% of jobs
$177.5K - $191.5K
5% of jobs
$38K
$115.9K
$191.5K
How much do remote pdk engineer jobs pay per year?
What is a Remote PDK Engineer?
What are the key skills and qualifications needed to thrive as a Remote PDK Engineer?
What are some typical challenges faced by Remote PDK Engineers when collaborating with global teams?
What is the difference between Remote Pdk Engineer vs Remote ASIC Design Engineer?
| Aspect | Remote Pdk Engineer | Remote ASIC Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's/Master's in Electrical Engineering or Computer Engineering, familiarity with PDKs | Bachelor's/Master's in Electrical Engineering or Computer Engineering, experience with ASIC design tools |
| Work Environment | Design labs, remote collaboration, EDA tools | Design teams, remote or onsite, EDA and simulation tools |
| Industry Usage | Semiconductor foundries, chip design companies | Integrated circuit design firms, semiconductor companies |
While both roles involve semiconductor design, a Remote Pdk Engineer focuses on developing and validating process design kits, whereas a Remote ASIC Design Engineer works on designing integrated circuits. Both require strong technical skills and industry knowledge, but their daily tasks and focus areas differ.
What cities are hiring for Remote Pdk Engineer jobs?
Cities with the most Remote Pdk Engineer job openings:
What are the most commonly searched types of Pdk Engineer jobs?
The most popular types of Pdk Engineer jobs are:
What states have the most Remote Pdk Engineer jobs?
States with the most job openings for Remote Pdk Engineer jobs include:
What job categories do people searching Remote Pdk Engineer jobs look for?
The top searched job categories for Remote Pdk Engineer jobs are:
- Remote Analog Layout Design Engineer
- Cadence Virtuoso
- Freelance Analog Layout Design Engineer
- Analog Mixed Signal Ams Verification Engineer
- Analog Layout Design Engineer
- Mask Layout Design Engineer
- Manager Analog Layout
- Urgently Hiring Analog Layout Design Engineer
- Principal Analog Design Engineer
- Phd In Analog Chip Design

Full-time
Re-posted 9 days ago
Job description
Major Area of Accountability:
- Development,verification, and release of PDK and IP collateral using industry-standard EDA tools.
- Technical liaison activities between internal teams, design houses, customers, and foundries to ensure successful development, tape-out, and manufacture of customer ICs.
- Technical support for customers using SkyWater PDKs and IP collateral.
- Development and enhancement of LVS and PEX extraction decks and design flows.
- Creation of test cases for verification and validation of LVS and PEX flows.
- Enablement and improvement of front to back-end IC design flows and manufacturing through PDK development, analysis, validation, and release.
- Working closely with design, layout, and process engineers to understand and incorporate semiconductor technology requirements into circuit element models and PDKs.
The job also requires performing other duties as assigned. Percentages of time spent on job duties are estimates and may vary for each position.
Required Qualifications:
Education: BS or MS in Electrical Engineering or related field.
Required Experience and Skills:
- 10 years of experience in PDK / EDA development and support.
- Strong understanding of IC technology stack.
- Experience setting up, testing and supporting LVS and parasitic extraction tools such as Mentor Calibre, Cadence PVS / Quantus, or Synopsys StarRC.
- Strong understanding of the IP design flow and its requirements, both analog and digital.
- Fluent in written and spoken English, with excellent technical writing and verbal communication skills.
U.S. Person Required: This position requires compliance with the International Traffic in Arms Regulations (ITAR). All accepted applicants must be U.S. Persons. ITAR defines a U.S. Person as U.S. citizen, U.S. Permanent Resident, Political Asylee, or Refugee.
Preferred Qualifications:
- Experience directly working with internal and external customers.
- Experience with 3D IC, interposers , more than Moore technologies.
- Knowledge and experience with other tools in the IC design flow, spice simulation.
- Familiarity with parasitic extraction tools such as Mentor Calibre xRC, Cadence Quantus, or Synopsys StarRC.
- Experience in IP project and/or library management.
- Familiarity with Tcl and other scripting languages.
- Proficiency in use of Cadence, Synopsys, or Mentor Graphics EDA software and scripting tasks within.
- Proficiency in Linux environment including scripting (Python, etc).
- Proficient with MS Office and Unix/Linux platforms.
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