Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Contract Term ... Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. * Proven experience in ...
Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Contract Term ... Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. * Proven experience in ...
Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Contract Term ... Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. * Proven experience in ...
Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Contract Term ... Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. * Proven experience in ...
Senior ASIC Design Verification Engineer
OR · Remote
$200K - $300K/yr
United States - Remote Key Qualifications: * BS and/or MS in Electrical Engineering, Computer ... Automation of testbench creation, tests, regression, or EDA tools * Knowledge of SystemC and/or DPI ...
Senior ASIC Design Verification Engineer
OR · Remote
$200K - $300K/yr
United States - Remote Key Qualifications: * BS and/or MS in Electrical Engineering, Computer ... Automation of testbench creation, tests, regression, or EDA tools * Knowledge of SystemC and/or DPI ...
RTL Design Engineer - AI Tools
San Francisco, CA · Remote
$100 - $175/hr
Remote Duration: 3+ months Commitment: 40 hours/week Role Responsibilities * Evaluate digital chip ... Experience with ASIC design flows and common EDA tools . * Ability to write clear design ...
Quick apply
RTL Design Engineer - AI Tools
San Francisco, CA · Remote
$100 - $175/hr
Remote Duration: 3+ months Commitment: 40 hours/week Role Responsibilities * Evaluate digital chip ... Experience with ASIC design flows and common EDA tools . * Ability to write clear design ...
Principal Engineer, Design Verification
Durham, NC · On-site +1
$131K/yr
Analog Devices offers a Flexible Work policy which includes remote work days and alternative ... of new EDA tools, verification IP, and emerging methodologies - Lead development of advanced ...
Principal Engineer, Design Verification
Durham, NC · On-site +1
$131K/yr
Analog Devices offers a Flexible Work policy which includes remote work days and alternative ... of new EDA tools, verification IP, and emerging methodologies - Lead development of advanced ...
Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Duration ... Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. * Proven experience in ...
Quick apply
Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Duration ... Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. * Proven experience in ...
Emergency Medicine Radiologist - Remote
Madison, WI · On-site +1
$322K - $403K/yr
It is anticipated that this position will be remote and requires work to be performed at an offsite ... EDA), which resulted in a grant award of up to $75 million to help accelerate growth of the state ...
Emergency Medicine Radiologist - Remote
Madison, WI · On-site +1
$322K - $403K/yr
It is anticipated that this position will be remote and requires work to be performed at an offsite ... EDA), which resulted in a grant award of up to $75 million to help accelerate growth of the state ...
Field Application Engineer, Software Sales
Frisco, TX · On-site +1
Qualifications * 5+ years of experience in EDA/PCB design, electronic system design, or CAD/CAE ... Our people-first culture and global support system, including the remote work option and Employee ...
Field Application Engineer, Software Sales
Frisco, TX · On-site +1
Qualifications * 5+ years of experience in EDA/PCB design, electronic system design, or CAD/CAE ... Our people-first culture and global support system, including the remote work option and Employee ...
Electrical Application Engineer
Mission Viejo, CA · Remote
$130K - $160K/yr
Remote Company Overview: From start-ups to blue-chips, Saratech (saratech.com) helps companies ... Gain further knowledge of CAD/CAM/CAE/PLM/eCAD/EDA solutions and market needs Qualifications:
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Electrical Application Engineer
Mission Viejo, CA · Remote
$130K - $160K/yr
Remote Company Overview: From start-ups to blue-chips, Saratech (saratech.com) helps companies ... Gain further knowledge of CAD/CAM/CAE/PLM/eCAD/EDA solutions and market needs Qualifications:
Emergency Medicine Radiologist - Remote
Madison, WI · On-site +1
$322K - $403K/yr
It is anticipated that this position will be remote and requires work to be performed at an offsite ... EDA), which resulted in a grant award of up to $75 million to help accelerate growth of the state ...
Emergency Medicine Radiologist - Remote
Madison, WI · On-site +1
$322K - $403K/yr
It is anticipated that this position will be remote and requires work to be performed at an offsite ... EDA), which resulted in a grant award of up to $75 million to help accelerate growth of the state ...
Data Scientist II
Washington, DC · On-site +1
Contribute to dbt models, lead EDA on unfamiliar datasets, and add checks that catch quality issues ... While this position is open to remote candidates across the U.S., we will prioritize those who live ...
Quick apply
Data Scientist II
Washington, DC · On-site +1
Contribute to dbt models, lead EDA on unfamiliar datasets, and add checks that catch quality issues ... While this position is open to remote candidates across the U.S., we will prioritize those who live ...
Data Scientist
Camden, NJ · On-site +1
$109K - $150K/yr
Conduct exploratory data analysis (EDA) to identify patterns, anomalies, and key demand drivers ... Hybrid work model based in Camden, NJ (Monday & Friday remote; Tuesday-Thursday in-office) * 10-15 ...
Data Scientist
Camden, NJ · On-site +1
$109K - $150K/yr
Conduct exploratory data analysis (EDA) to identify patterns, anomalies, and key demand drivers ... Hybrid work model based in Camden, NJ (Monday & Friday remote; Tuesday-Thursday in-office) * 10-15 ...
... remote, with occasional travel to customer sites, partner meetings, and industry events. KEY ... Arm, Cadence, Synopsys ecosystem), or EDA vendor * Familiarity with the chiplet ecosystem: UCIe ...
... remote, with occasional travel to customer sites, partner meetings, and industry events. KEY ... Arm, Cadence, Synopsys ecosystem), or EDA vendor * Familiarity with the chiplet ecosystem: UCIe ...
Data Scientist
Camden, NJ · On-site +1
$109K - $150K/yr
Conduct exploratory data analysis (EDA) to identify patterns, anomalies, and key demand drivers ... Hybrid work model based in Camden, NJ (Monday & Friday remote; Tuesday-Thursday in-office) * 10-15 ...
Data Scientist
Camden, NJ · On-site +1
$109K - $150K/yr
Conduct exploratory data analysis (EDA) to identify patterns, anomalies, and key demand drivers ... Hybrid work model based in Camden, NJ (Monday & Friday remote; Tuesday-Thursday in-office) * 10-15 ...
Senior Data Analyst
$88K - $112K/yr
Did we mention we're fully remote? We found that life is just better with a fully remote workforce ... Exploratory data analysis (EDA) * Hypothesis-driven analysis * Identifying trends, patterns, and ...
Senior Data Analyst
$88K - $112K/yr
Did we mention we're fully remote? We found that life is just better with a fully remote workforce ... Exploratory data analysis (EDA) * Hypothesis-driven analysis * Identifying trends, patterns, and ...
Senior Data Science Engineer/Specialist (Remote)
Johnstown, PA · Remote
$108K - $147K/yr
Senior Data Science Engineer/Specialist Concurrent Technologies Corporation Remote Minimum ... Perform sophisticated exploratory data analysis (EDA) to identify actionable insights and inform ...
Quick apply
Senior Data Science Engineer/Specialist (Remote)
Johnstown, PA · Remote
$108K - $147K/yr
Senior Data Science Engineer/Specialist Concurrent Technologies Corporation Remote Minimum ... Perform sophisticated exploratory data analysis (EDA) to identify actionable insights and inform ...
Field Application Engineer, Software Sales
Frisco, TX · On-site +1
Qualifications * 5+ years of experience in EDA/PCB design, electronic system design, or CAD/CAE ... Our people-first culture and global support system, including the remote work option and Employee ...
Quick apply
Field Application Engineer, Software Sales
Frisco, TX · On-site +1
Qualifications * 5+ years of experience in EDA/PCB design, electronic system design, or CAD/CAE ... Our people-first culture and global support system, including the remote work option and Employee ...
Applications Engineering, Staff Engineer - 16527
Sunnyvale, CA · On-site +1
$112K/yr
... Remote Eligible Yes Base Salary Range: $112000 - $168000 Descriptions & Requirements and ... Your expertise spans EDA tools such as IC Validator, Calibre, or Assura, and you possess a ...
Applications Engineering, Staff Engineer - 16527
Sunnyvale, CA · On-site +1
$112K/yr
... Remote Eligible Yes Base Salary Range: $112000 - $168000 Descriptions & Requirements and ... Your expertise spans EDA tools such as IC Validator, Calibre, or Assura, and you possess a ...
Data Scientist II
Crystal City, TX · On-site +1
Contribute to dbt models, lead EDA on unfamiliar datasets, and add checks that catch quality issues ... While this position is open to remote candidates across the U.S., we will prioritize those who live ...
Data Scientist II
Crystal City, TX · On-site +1
Contribute to dbt models, lead EDA on unfamiliar datasets, and add checks that catch quality issues ... While this position is open to remote candidates across the U.S., we will prioritize those who live ...
Data Scientist
Camden, NJ · On-site +1
$109K - $157K/yr
... data analysis (EDA) to identify patterns, anomalies, and key demand driversInsight ... Friday remote; Tuesday Thursday in-office)10 15% travel for company and customer ...
Data Scientist
Camden, NJ · On-site +1
$109K - $157K/yr
... data analysis (EDA) to identify patterns, anomalies, and key demand driversInsight ... Friday remote; Tuesday Thursday in-office)10 15% travel for company and customer ...
Remote Eda information
What is the difference between Remote Eda vs Remote Data Analyst?
| Aspect | Remote Eda | Remote Data Analyst |
|---|---|---|
| Required Credentials | Typically requires knowledge of EDA tools (e.g., Python, R, SQL) | Requires skills in data analysis, statistics, and visualization tools |
| Work Environment | Primarily focused on data exploration and cleaning | Analyzes data to generate reports and insights |
| Industry Usage | Common in data science, analytics, and research roles | Widely used across business, finance, marketing, and healthcare sectors |
| Search & Comparison Intent | Often compared for data preparation skills | Compared for insights and reporting capabilities |
Remote Eda specialists focus on exploring and cleaning data to prepare it for analysis, while Remote Data Analysts interpret data to generate reports and insights. Both roles require strong analytical skills but differ in their primary focus and tools used.
What are some common challenges faced by Remote EDA (Electronic Design Automation) engineers, and how can they be overcome?
What are the key skills and qualifications needed to thrive as a Remote EDA (Electronic Design Automation) Engineer, and why are they important?
What is a Remote EDA?

Full-time
Posted 28 days ago
Job description
Location - Remote (must be aligned with PST time zone)
Contract Term - Contract
Job Description
Experience
- 10+ years of hands-on experience in ASIC Design-for-Test (DFT)
Role Summary
- We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts and drive resolution of critical silicon issues.
- The ideal candidate will have strong hands-on expertise in DFT fundamentals, fault models, test coverage, diagnosis, and debug, as well as the ability to evaluate and adopt emerging DFT methodologies and architecture schemes to improve robustness, quality, and yield.
Key Responsibilities
- Lead DFT architecture, implementation, verification, and sign-off for complex ASIC and SoC designs.
- Drive scan architecture, scan insertion, scan chain stitching, and scan compression workflows to achieve high coverage and robust testability.
- Own MBIST/LBIST integration, implementation, verification, and debug across design and silicon bring-up phases.
- Perform DFT debug, failure analysis, root-cause investigation, and fault coverage closure for complex silicon issues.
- Develop and validate DFT constraints, including DFT SDC, timing checks, and DFT-specific timing analysis.
- Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to resolve integration and implementation issues.
- Support ATPG pattern generation, ATPG simulations, DRC analysis, test coverage analysis, and diagnosis/debug.
- Work on JTAG, boundary scan, iJTAG, SSN, and IP-level DFT integration.
- Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality.
- Act as a technical escalation point for advanced DFT and post-silicon debug issues.
- Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and automation.
- Develop scripts and automation using TCL, PERL, or Python to improve flow efficiency and debug productivity.
Required Skills & Qualifications
- Strong hands-on experience in ASIC DFT with end-to-end ownership.
- Solid understanding of DFT fundamentals, fault models, test techniques, and test coverage concepts.
- Deep expertise in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug.
- Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools.
- Proven experience in scan insertion, ATPG setup, simulation, debug, and DRC analysis.
- Experience with MBIST implementation and verification; SMS experience preferred.
- Experience with scan architecture and scan chain stitching; Tessent/SSN experience preferred.
- Strong understanding of PLLs, RTL design, synthesis flows, logical equivalence checking (LEC), and physical design implementation.
- Proven post-silicon debug and silicon bring-up experience.
- Exposure large SoC designs, hierarchical DFT flows, and multi-domain integration challenges.
- Strong communication skills and the ability to work independently with minimal ramp-up.
Preferred Experience
- MBIST post-silicon validation.
- ATPG simulations and fault coverage debug.
- DFT RTL, DFD, DFT verification, and IP-level DFT integration.
- DFT SDC creation and DFT timing closure support.
- Boundary scan, iJTAG, SSN, and design-for-debug methodologies.
- TCL/PERL scripting for DFT automation, reporting, and debugging.
- Experience working across multiple ASIC technology nodes and complex product development cycles.
- Familiarity with yield learning, diagnosis, and manufacturing test optimization.