ZipRecruiter

Log In

2

Remote Chip Design Jobs in Milpitas, CA (NOW HIRING)

Tensordyne

Principal ASIC Architect

Sunnyvale, CA · On-site +1

Headquartered in Sunnyvale, CA, and Munich, Germany, with remote team members across North America ... Analyze technical needs, propose chip design solutions, create detailed design specifications, lead ...

Tenstorrent

DFT Engineer

Santa Clara, CA · On-site +1

$100K - $500K/yr

... design. This role is remote based out of the United States. We welcome candidates at various ... Build and execute chip-level DFT strategies for high-speed CPU core designs and multi-chiplet ...

next page

Showing results 1-20

All JobsChip Design JobsRemote Chip Design JobsRemote Chip Design Jobs in Milpitas, CA

Remote Chip Design information

What is remote chip design?

Remote chip design refers to the process of designing integrated circuits (ICs) or semiconductor chips while working from a location outside of a traditional office or lab environment. Professionals in this field use specialized software and collaborate with teams online to create, test, and verify chip designs. Advances in cloud-based design tools and secure data sharing have made it possible for engineers to contribute to chip development projects from anywhere in the world. This flexibility allows companies to tap into a global talent pool and enables engineers to maintain a better work-life balance. Remote chip design is becoming increasingly popular in the semiconductor industry.

What are the key skills and qualifications needed to thrive as a remote chip design engineer?

To thrive as a Remote Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and a relevant degree such as BSEE or MSEE. Expertise in hardware description languages (HDLs) like Verilog or VHDL, familiarity with EDA tools (e.g., Cadence, Synopsys), and knowledge of FPGA or ASIC workflows are typically required. Strong problem-solving skills, attention to detail, and effective remote communication stand out as vital soft skills for collaborating with distributed teams. These capabilities ensure efficient design cycles, high-quality deliverables, and seamless teamwork in a remote engineering environment.

What are some common challenges faced by professionals working in remote chip design roles, and how can they be managed?

Remote chip design professionals often encounter challenges such as coordinating across time zones, ensuring secure access to proprietary design tools, and maintaining effective communication with cross-functional teams. To manage these, it's important to establish clear collaboration protocols, use secure cloud-based design platforms, and set regular check-ins with team members. Successful remote designers also prioritize documentation and proactive communication to keep projects on track and aligned with overall goals.

What is the difference between Remote Chip Design vs Remote ASIC Design?

AspectRemote Chip DesignRemote ASIC Design
CredentialsBachelor's or Master's in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning integrated circuits, often in collaborative teams, using CAD toolsDesigning custom ASICs, involving detailed specifications and verification processes
Industry UsageSemiconductor companies, hardware firms, tech giantsSemiconductor companies, specialized hardware firms, tech industry
Search & Comparison IntentHigh overlap in skills and tools, often compared for job roles in chip development

Remote Chip Design and Remote ASIC Design share similar educational backgrounds and work environments, focusing on integrated circuit development. While both roles involve hardware design, ASIC Design emphasizes custom chip creation for specific applications, often requiring detailed verification. Candidates should have strong engineering fundamentals and experience with CAD tools. The roles are highly comparable, with differences mainly in project scope and specialization.

Is remote chip design a good career?

Remote chip design is a viable career option in the semiconductor industry, offering opportunities for engineers skilled in hardware description languages, circuit design, and simulation tools. It often requires strong technical skills, a relevant degree, and the ability to collaborate virtually with teams. The field is expected to grow with advancements in electronics and integrated circuits, making it a stable career choice for qualified professionals.

What is the salary of remote chip design?

The salary for remote chip design engineers typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Senior roles or those with specialized skills in FPGA, ASIC, or VHDL may earn higher compensation, often supplemented with bonuses or stock options.

What are popular job titles related to Remote Chip Design jobs in Milpitas, CA?

For Remote Chip Design jobs in Milpitas, CA, the most frequently searched job titles are:

What cities near Milpitas, CA are hiring for Remote Chip Design jobs?

Cities near Milpitas, CA with the most Remote Chip Design job openings:

Remote Chip Design jobs near you

Principal ASIC Architect

Sunnyvale, CA • On-site, Remote

Tensordyne
See more jobs at Tensordyneexternal

Full-time

Re-posted 24 days ago

Job description

About our company - Tensordyne (formerly Recogni)

AI is reshaping our world, performing cognitive tasks once unique to humans-perceiving across modalities, learning quickly, and solving complex problems. Tensordyne builds high-performance, low-power generative AI inference systems. We're leveraging novel techniques from the latest AI research to build custom silicon, hardware, and software to accelerate multimodal generative AI at scale-delivering safe, sustainable, cutting-edge solutions for hyperscaler and neocloud data centers. Headquartered in Sunnyvale, CA, and Munich, Germany, with remote team members across North America and Europe, Tensordyne is a well-funded, fast-moving startup. We support our people with competitive pay, comprehensive benefits, flexibility, and recognition programs-because breakthrough technology starts with a healthy, empowered team. Come join us, as we shape the future of AI together!

The Opportunity:

In this role, you will lead all phases of ASIC architecture definition and design of Tensordyne's next-generation family of processors for generative AI inference acceleration. This is an exciting opportunity that involves high-level silicon architecture planning, hands-on design, prototyping of ASIC design concepts, mentoring, and technical leadership to deliver the high-performance multi-chip silicon solutions that are at the heart of Tensordyne's vertically integrated, generative AI inference acceleration systems for data centers.

  • What You'll Do:
  • Lead the architectural planning and definition of new Tensordyne AI processors, that consist of highly specialized floating point AI compute cores, embedded memory, embedded RISC-V CPU cores, and high speed serial communications with chip-to-chip networking fabric, HBM, and PCIe connectivity.
  • Analyze technical needs, propose chip design solutions, create detailed design specifications, lead architectural modeling and establish ASIC development milestones to ensure that the final product meets requirements related to functionality, inference performance, inference accuracy, power efficiency, programmability, debuggability and manufacturability.
  • Work closely with external engineering partners, ASIC design engineers, ASIC design verification teams, SOC physical design teams, interdisciplinary software teams, product management and executives, providing technical guidance, overseeing design reviews and mentoring where applicable.
  • Lead the evaluation of new silicon IP technologies, EDA tools and methodologies to enhance the product and improve the efficiency of our chip design process.

What You'll Bring:

  • 15+ years of hands-on experience and deep expertise in silicon design engineering and architectural planning of high performance compute (HPC) processors like GPUs, CPUs, TPUs etc., as well as HBM and high speed SerDes networking technologies for AI workloads.
  • Strong understanding of generative AI algorithms, attention mechanisms, foundation transformer models, and mapping these functions to hardware.
  • Strong Verilog programming skills, and experience with RTL verification, and performance modeling. Experience with performance analysis, debugging, and optimization is also required.
  • Track record of developing architectural C-models, SystemC, or TLM. Expert-level skills in C/C++, and scripting languages like Python or Perl for automation and modeling.
  • An MS or PhD in Electrical Engineering, Computer Engineering or related engineering discipline.

For this role, occasional travel is needed to interact with global engineering partners.

Tensordyne's culture was built on the following values:

  • Put people first. We only succeed when our people succeed.
  • Ethics and integrity always; Being open, honest, and respectful of everyone.
  • Think Big. Be ambitious and have audacious goals.
  • Aim for excellence. Quality and excellence count in everything we do.
  • Own it and get it done. Results matter!
  • Make each person better together, than they would be as an individual.
  • Embrace each others' differences, and embrace that there will be differences.

Tensordyne is an equal opportunity employer. We believe that a diverse team is better at tackling complex problems and coming up with innovative solutions. All qualified applicants will receive consideration for employment without regard to age, color, gender identity or expression, marital status, national origin, disability, protected veteran status, race, religion, pregnancy, sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances.

A note to Recruitment Agencies: Please don't reach out to Tensordyne employees or leaders about our roles -- we've got it covered. We don't accept unsolicited agency resumes and we are not responsible for any fees related to unsolicited resumes. Thank you for your understanding.

Apply