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Remote Asic Rtl Design Engineer Jobs in Hartford, CT

... reviewing engineering artifacts and ensuring verification deliverables meet design and quality ... UVM RAL Model, ASIC/FPGA verification; RTL debugging; waveform analysis; C/C++; DPI; Python; Perl;

... reviewing engineering artifacts and ensuring verification deliverables meet design and quality ... UVM RAL Model, ASIC/FPGA verification; RTL debugging; waveform analysis; C/C++; DPI; Python; Perl;

AI Engineer

Hartford, CT · On-site +1

$1/hr

... design recommendations. · Write, debug, test, and maintain high-quality production code using ... engineering teams to design, develop, and deploy AI-enabled solutions. · Document system ...

While this is a full remote position, there is preference for candidates located in the Northern California area. Main Accountabilities: * Lead and support engineering design activities for new and ...

While this is a full remote position, there is preference for candidates located in the Northern California area. Main Accountabilities: * Lead and support engineering design activities for new and ...

While this is a full remote position, there is preference for candidates located in the Northern California area. Main Accountabilities: * Lead and support engineering design activities for new and ...

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Remote Asic Rtl Design Engineer information

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$94.8K

$151.5K

$203.8K

How much do remote asic rtl design engineer jobs pay per year?

As of Aug 25, 2026, the average yearly pay for remote asic rtl design engineer in Hartford, CT is $151,505.00, according to ZipRecruiter salary data. Most workers in this role earn between $132,600.00 and $181,600.00 per year, depending on experience, location, and employer.

What is a remote ASIC RTL design engineer?

A Remote ASIC RTL Design Engineer is a professional who specializes in designing the Register Transfer Level (RTL) code for Application-Specific Integrated Circuits (ASICs) while working remotely. Their main responsibilities include creating and verifying digital circuit designs using hardware description languages such as Verilog or VHDL. These engineers collaborate with hardware teams to ensure functionality, performance, and power requirements are met, all while operating from a location outside of a traditional office setting. They often use remote collaboration tools and simulation software to review and validate designs before fabrication.

What are the key skills and qualifications needed to thrive as a remote ASIC RTL design engineer?

To thrive as a Remote ASIC RTL Design Engineer, you need a solid background in digital design, computer engineering, and hardware description languages like Verilog or VHDL, often supported by a relevant degree. Proficiency with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, as well as experience with simulation, synthesis, and version control systems, is crucial. Strong problem-solving, self-motivation, and effective remote communication skills distinguish top performers in this role. These skills ensure accurate, efficient design cycles and effective collaboration across distributed teams, leading to successful chip delivery.

What are some common challenges faced by remote ASIC RTL design engineers, and how can they be addressed?

Remote ASIC RTL Design Engineers often face challenges such as coordinating with distributed teams across different time zones and ensuring effective communication during complex design phases. To address these issues, it’s important to establish clear documentation practices, utilize collaboration tools like version control and video conferencing, and schedule regular check-ins with team members. Additionally, staying proactive in seeking feedback and clarifying design specifications helps ensure alignment and reduces misunderstandings. Building strong virtual relationships with verification and backend teams can also streamline the handoff process and overall project flow.

What is the difference between Remote Asic Rtl Design Engineer vs Remote Digital IC Design Engineer?

AspectRemote Asic Rtl Design EngineerRemote Digital IC Design Engineer
Primary FocusRegister Transfer Level (RTL) design for ASICsDigital integrated circuit design at the IC level
Skills & CertificationsHDL (Verilog/VHDL), EDA tools, verificationHDL, circuit simulation, verification, FPGA experience
Work EnvironmentASIC design teams, hardware developmentIC design teams, semiconductor industry
Industry UsageUsed in ASIC development for various applicationsUsed in digital IC manufacturing and prototyping

Both roles involve digital design and HDL skills, but the Remote Asic Rtl Design Engineer focuses on RTL coding for ASICs, while the Remote Digital IC Design Engineer covers broader digital IC design, including FPGA and chip-level work. They share similar credentials and work environments, often overlapping in semiconductor companies.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Hartford, CT?

The most popular types of Asic Rtl Design Engineer jobs in Hartford, CT are:

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For Remote Asic Rtl Design Engineer jobs in Hartford, CT, the most frequently searched job titles are:

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The top searched job categories for Remote Asic Rtl Design Engineer jobs in Hartford, CT are:

What cities near Hartford, CT are hiring for Remote Asic Rtl Design Engineer jobs?

Cities near Hartford, CT with the most Remote Asic Rtl Design Engineer job openings:

Senior Technical Lead

Windsor, CT • Remote


Quest Global

7.8

Company rating: 7.8 out of 10

Based on 11 frontline employees who took The Breakroom Quiz

243rd of 450 rated engineering

People enjoy working here

Good employer

Paid breaks


Full-time

Posted 6 days ago


Job description

Job Requirements


Company: Quest Global Services-N.A., Inc.
Position Title: Sr. Technical Lead
Location: 175 Addison Rd, Entrance A, Windsor, CT 06095 and unanticipated client
locations throughout the U.S.


Position Responsibilities: Verification and Validation of FPGAs, support project execution by
reviewing engineering artifacts and ensuring verification deliverables meet design and quality
requirements by performing timely reviews of all the artifacts generated by the team(s).
Requirements Review, Verification and Validation of FPGAs. Collaborate with cross-functional
engineering teams and provide technical guidance on verification activities. Perform the
certification documentation reviews and baseline the certification plans. Create planning
documentation - Plans, PHAC, HVVP, HCMP, and HPAP. Develop Simulation test benches using
languages such as System Verilog and UVM. Create simulation test cases and procedures
document. Create Problem reports/Change Requests, co-ordinate all the problem reports/change
requests created by remote team(s) and drive them to closure. Coordinate with Change Control
Board (CCB), participate in CCB Meetings with Customer Technical Team(s) to get the change
requests/problem reports approved. Document the issues identified in requirements and design,
communicate with Customer technical team(s) and drive to closure. Communication of DO-254
certification aspects with Customer and its customers. Participate in all the technical reviews,
implement the findings, guide the team(s) on complex findings to ensure compliance to DO-254
DAL A objectives and drive to closure Participate in certification audits and compliance reviews
with customer and regulatory stakeholders., throughout the program, document the audit actions
and drive them to closure. Participate in all the daily/weekly status meetings and drive the entire
team(s) per customer/program expectations.


Position Requirements: Bachelor's degree (or foreign equivalent) in Electronics Engineering, or a
related field, PLUS five (5) years of experience in the job offered or a related position. Experience
must include demonstrable knowledge of: System Verilog; UVM methodologies; UVM RAL
Model, ASIC/FPGA verification; RTL debugging; waveform analysis; C/C++; DPI; Python; Perl;
PCIe; SPI; I2C; Ethernet; DDR; ARINC; AMBA-AXI; AHB; VIP; HIL test setups; JTAG; logic
analyzers; Synopsys VCS; Cadence Xcelium/Incisive; Mentor QuestaSim; Git; SVN; DOORS;
JIRA; DO-254; PHAC; HVVP; HCMP, and CCB. Required knowledge may be gained prior to or
concurrently with Bachelor's degree. Travel to unanticipated client locations throughout the U.S.,
approximately 30%, as required. May telecommute from any location within the U.S.
 

Apply at careers.quest-global.com and reference Job Code 28290.0340


Employment Type: FULL_TIME

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