You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify ... You inspire high performance by mentoring engineers, advancing performance verification ...
You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify ... You inspire high performance by mentoring engineers, advancing performance verification ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects ...
Senior Design Verification Engineer
Tempe, AZ · On-site
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Senior Design Verification Engineer
Tempe, AZ · On-site
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Design Verification Engineer - Viasat Government
$164K - $246K/yr
Work with RTL design engineers and system architects to define verification plans based on system specifications, design goals, and use cases * Develop and maintain verification environment in ...
Design Verification Engineer - Viasat Government
$164K - $246K/yr
Work with RTL design engineers and system architects to define verification plans based on system specifications, design goals, and use cases * Develop and maintain verification environment in ...
Design Verification Engineer - Viasat Government
$164K - $246K/yr
Work with RTL design engineers and system architects to define verification plans based on system specifications, design goals, and use cases * Develop and maintain verification environment in ...
Design Verification Engineer - Viasat Government
$164K - $246K/yr
Work with RTL design engineers and system architects to define verification plans based on system specifications, design goals, and use cases * Develop and maintain verification environment in ...
You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify ... You inspire high performance by mentoring engineers, advancing performance verification ...
You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify ... You inspire high performance by mentoring engineers, advancing performance verification ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects ...
Design Verification Engineer - Viasat Government
Marlborough, MA · On-site
$164K - $246K/yr
You will use your engineering experience to develop the next generation of advanced communications ... You will be responsible for RTL verification at both the unit and system level, as well as creating ...
Design Verification Engineer - Viasat Government
Marlborough, MA · On-site
$164K - $246K/yr
You will use your engineering experience to develop the next generation of advanced communications ... You will be responsible for RTL verification at both the unit and system level, as well as creating ...
Design verification Engineer
San Jose, CA · On-site
$158K - $192K/yr
Job Title: Design Verification Engineer Location: San Jose, CA We are seeking DV engineers to ... Debug RTL and testbench issues * Drive coverage closure (functional + code) Required Skills:
Design verification Engineer
San Jose, CA · On-site
$158K - $192K/yr
Job Title: Design Verification Engineer Location: San Jose, CA We are seeking DV engineers to ... Debug RTL and testbench issues * Drive coverage closure (functional + code) Required Skills:
Principal Design Verification Engineer - CPU Subsystem Power Management
Austin, TX · On-site
$200 - $250/hr
Partner closely with architecture, RTL, DV, and infrastructure teams to review specifications ... Mentor engineers and provide technical leadership across the power‑management verification area ...
Principal Design Verification Engineer - CPU Subsystem Power Management
Austin, TX · On-site
$200 - $250/hr
Partner closely with architecture, RTL, DV, and infrastructure teams to review specifications ... Mentor engineers and provide technical leadership across the power‑management verification area ...
Interface IP Verification Engineer (Pre-Silicon) - 18380
Austin, TX · On-site
$114K - $170K/yr
Date posted 08/13/2026 Category Engineering Hire Type Employee Job ID 18380 Base Salary Range ... Debug challenging RTL, protocol, and system-level issues while improving verification efficiency ...
Interface IP Verification Engineer (Pre-Silicon) - 18380
Austin, TX · On-site
$114K - $170K/yr
Date posted 08/13/2026 Category Engineering Hire Type Employee Job ID 18380 Base Salary Range ... Debug challenging RTL, protocol, and system-level issues while improving verification efficiency ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects ...
Graphics Cache Hierarchy Design Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects ...
Senior Design Verification Engineer
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Senior Design Verification Engineer
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Senior/Principal Interface IP Verification Engineer (Pre-Silicon)- 15149
Austin, TX · On-site
$166K - $249K/yr
Debug challenging RTL, protocol, and system-level issues while improving verification efficiency ... Mentor engineers and contribute to verification methodology improvements across the organization.
Senior/Principal Interface IP Verification Engineer (Pre-Silicon)- 15149
Austin, TX · On-site
$166K - $249K/yr
Debug challenging RTL, protocol, and system-level issues while improving verification efficiency ... Mentor engineers and contribute to verification methodology improvements across the organization.
Interface IP Verification Engineer (Pre-Silicon) - 18381
Austin, TX · On-site
$114K - $170K/yr
Date posted 08/13/2026 Category Engineering Hire Type Employee Job ID 18381 Base Salary Range ... Debug challenging RTL, protocol, and system-level issues while improving verification efficiency ...
Interface IP Verification Engineer (Pre-Silicon) - 18381
Austin, TX · On-site
$114K - $170K/yr
Date posted 08/13/2026 Category Engineering Hire Type Employee Job ID 18381 Base Salary Range ... Debug challenging RTL, protocol, and system-level issues while improving verification efficiency ...
Senior Design Verification Engineer
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Senior Design Verification Engineer
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Role and Responsibilities As a Senior Engineer GPU Graphics Core Performance Verification Engineer ... You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify ...
Role and Responsibilities As a Senior Engineer GPU Graphics Core Performance Verification Engineer ... You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify ...
Role and Responsibilities As a Senior Engineer GPU Graphics Core Performance Verification Engineer ... You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify ...
Role and Responsibilities As a Senior Engineer GPU Graphics Core Performance Verification Engineer ... You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify ...
Role and Responsibilities As a Senior Engineer GPU Graphics Core Performance Verification Engineer ... You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify ...
Role and Responsibilities As a Senior Engineer GPU Graphics Core Performance Verification Engineer ... You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify ...
Senior Design Verification Engineer
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Senior Design Verification Engineer
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
RTL Verification Engineer information
See salary details
$105.5K - $111.1K
0% of jobs
$111.1K - $116.7K
0% of jobs
$116.7K - $122.3K
0% of jobs
$122.3K - $127.9K
0% of jobs
$127.9K - $133.5K
0% of jobs
$135.6K is the 25th percentile. Wages below this are outliers.
$133.5K - $139K
65% of jobs
$139K - $144.6K
0% of jobs
$144.6K - $150.2K
0% of jobs
$150.2K - $155.8K
0% of jobs
$155.8K - $161.4K
0% of jobs
$163K is the 75th percentile. Wages above this are outliers.
$161.4K - $167K
35% of jobs
$105.5K
$149.2K
$167K
How much do rtl verification engineer jobs pay per year?
What is an RTL verification engineer?
An RTL Verification Engineer is responsible for ensuring the functional correctness of digital designs at the Register Transfer Level (RTL). They develop and execute testbenches, write verification plans, and use simulation tools to identify design issues. Common methodologies include UVM (Universal Verification Methodology) and formal verification techniques. They collaborate with design and architecture teams to debug and refine chip designs before fabrication. This role is critical in preventing costly hardware bugs in silicon.
What skills and qualifications are needed to thrive as an RTL verification engineer?
To thrive as an RTL Verification Engineer, you need a solid understanding of digital design principles, proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, and a degree in electrical engineering or a related field. Experience with verification methodologies (UVM, SystemVerilog), simulation tools (ModelSim, VCS), and scripting languages (Perl, Python) is highly valuable. Strong analytical thinking, teamwork, and effective communication skills help you stand out in collaborative, deadline-driven environments. Mastering both technical expertise and interpersonal skills ensures accurate, timely validation of complex digital designs essential for successful chip development.
What are common challenges faced by RTL verification engineers, and how can they be addressed?
RTL Verification Engineers often face challenges such as identifying elusive design bugs, managing large-scale testbenches, and keeping up with evolving verification methodologies. These issues are typically addressed by using robust verification frameworks, collaborating closely with design and validation teams, and adopting automated testing and coverage-driven verification techniques. Staying current with industry trends and tool advancements can also help engineers work more efficiently. By building strong communication lines and adopting best practices, common obstacles can be overcome effectively, leading to successful project outcomes.
What cities are hiring for Rtl Verification Engineer jobs?
Cities with the most Rtl Verification Engineer job openings:
What are popular job titles related to Rtl Verification Engineer jobs?
For Rtl Verification Engineer jobs, the most frequently searched job titles are:

Staff Engineer, GPU Graphic Core Performance Verification
San Jose, CA
Full-time
Medical, Dental, Vision, Life, Retirement, PTO
Re-posted 14 days ago
Samsung Electronics rating
6.7
Based on 50 frontline employees who took The Breakroom Quiz
130th of 162 rated electronics manufacturers
Job description
Position Summary
Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy - the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us!Role and Responsibilities
As a Staff GPU Graphics Core Performance Verification Engineer, you will help lead pre-silicon performance verification and correlation for Samsung's next-generation GPU and system-level IP. Your work will directly influence architectural validation, performance predictability, and workload optimization by ensuring GPU designs meet targeted performance expectations across architectural models, emulation, and silicon environments.
In this high-impact individual contributor role, you will contribute to performance verification strategy, develop scalable test infrastructure, and analyze GPU performance behavior across complex graphics and compute workloads. You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify bottlenecks, debug performance issues, and guide performance tuning from early architectural exploration through silicon bring-up.
- Leveraging your expertise in GPU architecture and performance analysis, you architect and drive pre-silicon performance verification strategies, methodologies, and execution flows for graphics core and GPU subsystem validation.
- You develop and maintain performance verification infrastructure, including test environments, workloads, profiling tools, automation, and scalable verification flows to characterize GPU performance across simulation, emulation, and architectural platforms.
- You ensure technical excellence by analyzing, correlating, and comparing performance behavior across architectural models, RTL, emulation, and silicon, identifying bottlenecks and driving data-driven optimization strategies
- You lead cross-functional collaboration with GPU architecture, Modeling, RTL, Verification, and Software teams to define performance targets, debug performance issues, align workload behavior with architectural intent, and improve overall GPU efficiency and scalability
- You inspire high performance by mentoring engineers, advancing performance verification methodologies, and fostering a culture of ownership, innovation, and continuous learning while staying ahead of emerging GPU architectures, graphics workloads, and AI/ML compute trends.
Skills and Qualifications
- 6+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 4+ years of experience with a Master's degree, or 2+ years of experience with a PhD.
- Strong experience in GPU performance verification, architectural validation, workload analysis, or performance modeling for GPU, CPU, or complex SoC designs
- Strong understanding of GPU architecture, graphics pipelines, compute workloads, and microarchitecture performance behavior
- Strong hands-on programming experience in C++ and Python within Linux development environments
- Experience developing performance tests, profiling infrastructure, automation frameworks, and workload characterization methodologies
- Strong experience analyzing and correlating performance behavior across architectural models, RTL simulation, emulation, and/or silicon environments
- Familiarity with graphics and compute APIs such as OpenGL, Vulkan, OpenCL, or related GPU software stacks
- Excellent analytical and problem-solving skills, with the ability to identify bottlenecks, propose solutions and guide teams through implementation.
- Excellent communication and collaboration skills, with the ability to navigate ambiguity and influence in a fast-paced, global team environment.
Preferred Qualifications:
- Experience with SystemC, performance simulators, or cycle-approximate GPU modeling environments
- Experience with RTL verification, emulation, or post-silicon performance analysis
- Familiarity with AI/ML, graphics rendering, or heterogeneous compute workloads
- Experience with Sparta or other hardware/system modeling frameworks
Our Team
The GPU Architect team delivers whole system architecture-level design for Samsung's current and next-generation mobile GPUs. Our work spans a wide range of disciplines-from early-stage architectural exploration and research in graphics and machine learning, to shaping the GPU innovation roadmap, defining new features, building models, and delivering microarchitecture design and programming. Our Xclipse GPU is the first mobile GPU with ray tracing technology that enables console-level graphics for Samsung Galaxy smartphones.
Joining our team means collaborating with talented engineers from diverse technical backgrounds across a global organization. Here you'll contribute to the roadmap for next-generation technologies, broaden your expertise, and solve impactful challenges in a supportive environment that values collaboration, continuous learning, and growth.
Total Rewards
At Samsung - SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $167,800 and $251,800. Your actualbase pay will depend on variables that may includeyour educationskills, qualifications, experience, and worklocation.
Samsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.
Additionally, this role might be eligible to participate in long term incentive plan and relocation.
This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA).
Trade Secrets
By submitting an application, you agree not to disclose to Samsung or induce or encourage Samsung to use any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.
U.S. Export Control
This role may require access to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.
#SARC #ACL
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* Samsung Electronics America, Inc. and its subsidiaries are committed to employing a diverse workforce, and provide Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
What Samsung Electronics employees say
Pay
Benefits
Hours and flexibility
Workplace
Get the full story on Breakroom
About Samsung Electronics
Sourced by ZipRecruiter
Industry
Appliances and electrical and electronics wholesalers, technology, communication and media and manufacturing
Company size
10,000+ Employees
Headquarters location
Ridgefield Park, NJ, US