With a strong foundation in RF integration, pSemi's product portfolio now spans power management ... Utilize TCAD process and device simulations (2D/3D) to understand device behavior, evaluate ...
With a strong foundation in RF integration, pSemi's product portfolio now spans power management ... Utilize TCAD process and device simulations (2D/3D) to understand device behavior, evaluate ...
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Process Integration Manager information
See Vista, CA salary details
$37.8K - $52.6K
4% of jobs
$52.6K - $67.4K
5% of jobs
$79.5K is the 25th percentile. Wages below this are outliers.
$67.4K - $82.1K
19% of jobs
$82.1K - $96.9K
17% of jobs
The median wage is $103K / yr.
$96.9K - $111.7K
12% of jobs
$111.7K - $126.5K
12% of jobs
$133.1K is the 75th percentile. Wages above this are outliers.
$126.5K - $141.3K
15% of jobs
$141.3K - $156K
6% of jobs
$156K - $170.8K
6% of jobs
$170.8K - $185.6K
2% of jobs
$185.6K - $200.4K
2% of jobs
$37.8K
$113.6K
$200.4K
How much do process integration manager jobs pay per year?
What are the most common cross-functional collaborations for a process integration manager, and how do they impact daily responsibilities?
What is a process integration manager?
What is the difference between Process Integration Manager vs Process Engineer?
| Aspect | Process Integration Manager | Process Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Engineering, often with project management certifications | Bachelor's or Master's in Chemical, Mechanical, or Industrial Engineering |
| Work Environment | Oversees multiple projects, collaborates with cross-functional teams, strategic planning | Focuses on designing, analyzing, and optimizing specific processes |
| Industry Usage | Common in manufacturing, chemical, and energy sectors | Widely used across similar industries for process development |
The Process Integration Manager typically oversees multiple process projects, focusing on strategic coordination and integration, while the Process Engineer concentrates on designing and optimizing individual processes. Both roles require engineering backgrounds, but the manager's role is more managerial and strategic, whereas the engineer's role is more technical and hands-on.
What are the key skills and qualifications needed to thrive as a process integration manager?
What cities near Vista, CA are hiring for Process Integration Manager jobs?
Cities near Vista, CA with the most Process Integration Manager job openings:

Full-time
Posted 4 days ago
Job description
pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor’s 30-year legacy of technology advancements and strong IP portfolio but with a new mission—to enhance Murata’s world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi’s product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi’s team explores new ways to make electronics for the connected world smaller, thinner, faster and better.
Job Summary
Member of team responsible for RF Technology development for pSemi’s patented high-performance UltraCMOS™ technology. This position will work closely with technology, modeling and CAD engineers to support internal design groups and external foundry customers driving device development, simulation, characterization and optimization of advanced RF-SOI technologies for RF front-end applications including RF switches, low noise amplifiers (LNA), power amplifiers (PA), analog and digital solutions.
Roles & Responsibilities
This position has responsibility for:
- RFSOI Device development and technology optimization projects in collaboration with cross-functional teams.
- Develop a deep understanding of the relationship between RF performance, DC performance, device architecture, layout, process integration, and manufacturing variability.
- Design and execute technology development vehicles, split lots, and Design of Experiments (DOE) for process and device optimization.
- Utilize TCAD process and device simulations (2D/3D) to understand device behavior, evaluate technology options, and guide development decisions.
- Correlate TCAD simulation results with silicon measurements and characterization data.
- Work closely with wafer fabrication and process integration teams to optimize device performance, yield, and reliability.
- Work closely with Characterization team and create measurement plan for semiconductor devices such as DC, CV, RF, small-signal, large-signal, load-pull, and reliability methodologies.
- Analyze process sensitivities and identify opportunities for performance, manufacturability, and yield improvement.
- Apply statistical methodologies to evaluate device distributions, process capability, variability sources, and reliability trends.
- Partner with foundries and internal fabrication teams to resolve process integration issues and improve technology robustness.
- Support compact model development, device parameter extraction, and technology qualification activities.
- Generate technical reports and present findings to engineering management and cross-functional stakeholders.
Minimum Qualifications (Experience and Skills)
- Strong understanding of semiconductor device physics, particularly SOI and RFSOI technologies.
- Hands-on experience with semiconductor process development and wafer fabrication.
- Experience working with CMOS and SOI process technologies.
- Experience with TCAD process and device simulation tools such as Synopsys or Silvaco.
- Experience using JMP, MATLAB, Python or equivalent statistical software.
- Excellent data analysis, problem-solving, and communication skills.
- Basic understanding of high frequency measurements (S-parameters, Load Pull, Harmonics, and Noise Figure).
- Understanding of device reliability mechanisms including HCI, BTI, TDDB, and ESD.
- Basic understanding of how devices are used in RFIC design.
- Understanding of the interaction between semiconductor manufacturing and device performance
Preferred Qualifications
- Experience developing RF SOI switches, LNAs, PAs, or related RF front-end products.
- Experience working directly with semiconductor foundries and manufacturing organizations.
- Knowledge of process integration, technology transfer, and yield ramp activities.
- Experience with Cadence design and layout environments.
- Familiarity with circuit simulation tools such as Cadence Virtuoso or ADS.
- Programming experience in Python, MATLAB, JMP or similar environments for data analysis and automation.
- Understanding of small and large signal characterization and data analysis.
- Reliability Testing
- Strong background in RF device characterization and analysis.
Education Requirements
- BS & 7-10 years experience
- MS & 5-7 years experience
- Ph.D. & 2-3 years experience
Work Environment
This job operates in a professional office environment. This role routinely uses standard office equipment.
Physical Demands
The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds.
USD 155,195.29 - 201,765.06 per year
pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver’s license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including “protected veterans” under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics.
Note: The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents: http://patents.psemi.com