Deep experience in RF PLL design including Sigma delta, FRAC-N PLL. Phase noise and spurius signal, settling time. Experience with PLL buildng blocks such as PFD, charge pumps, dividers, multipliers.
Deep experience in RF PLL design including Sigma delta, FRAC-N PLL. Phase noise and spurius signal, settling time. Experience with PLL buildng blocks such as PFD, charge pumps, dividers, multipliers.
The candidate will have the opportunity to develop system level designs incorporating high-performance and high-frequency RF, data converter, SERDES, DSP and PLL subsystems. A demonstrated track ...
The candidate will have the opportunity to develop system level designs incorporating high-performance and high-frequency RF, data converter, SERDES, DSP and PLL subsystems. A demonstrated track ...
The candidate will have the opportunity to develop system level designs incorporating high-performance and high-frequency RF, data converter, SERDES, DSP and PLL subsystems. A demonstrated track ...
The candidate will have the opportunity to develop system level designs incorporating high-performance and high-frequency RF, data converter, SERDES, DSP and PLL subsystems. A demonstrated track ...
In conjunction with the Regional Product Lead and PLL Leadership delegate underwriting authority to staff via letters of authority; monitor and revise as appropriate. Ensure a quality underwriting ...
In conjunction with the Regional Product Lead and PLL Leadership delegate underwriting authority to staff via letters of authority; monitor and revise as appropriate. Ensure a quality underwriting ...
Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example) * Should be able to lead the project * Experience with analog layout ...
Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example) * Should be able to lead the project * Experience with analog layout ...
Chip Lead: Analog & Mixed-Signal Layout Engineer
Billerica, MA · On-site
$214K/yr
Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example) * Should be able to lead the project * Experience with analog layout ...
Quick apply
Chip Lead: Analog & Mixed-Signal Layout Engineer
Billerica, MA · On-site
$214K/yr
Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example) * Should be able to lead the project * Experience with analog layout ...
... PLL etc. * Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis * Experience with analog and digital behavioral modeling and ...
... PLL etc. * Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis * Experience with analog and digital behavioral modeling and ...
Analog/Mixed-Signal IC Verification Engineer
Billerica, MA · On-site
$214K/yr
... PLL etc. * Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis * Experience with analog and digital behavioral modeling and ...
Quick apply
Analog/Mixed-Signal IC Verification Engineer
Billerica, MA · On-site
$214K/yr
... PLL etc. * Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis * Experience with analog and digital behavioral modeling and ...
Analog/Mixed-Signal IC Design Engineer
Billerica, MA · On-site
$214K/yr
... PLL etc. * Must have experience with evaluating silicon on bench and familiarity with standard lab equipment * Strong intuitive and analytical understanding of transistor-level circuit design ...
Quick apply
Analog/Mixed-Signal IC Design Engineer
Billerica, MA · On-site
$214K/yr
... PLL etc. * Must have experience with evaluating silicon on bench and familiarity with standard lab equipment * Strong intuitive and analytical understanding of transistor-level circuit design ...
... PLL etc. * Must have experience with evaluating silicon on bench and familiarity with standard lab equipment * Strong intuitive and analytical understanding of transistor-level circuit design ...
... PLL etc. * Must have experience with evaluating silicon on bench and familiarity with standard lab equipment * Strong intuitive and analytical understanding of transistor-level circuit design ...
Senior SerDes Analog Design
Billerica, MA · On-site
$214K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Quick apply
Senior SerDes Analog Design
Billerica, MA · On-site
$214K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Senior Analog/Mixed-Signal IC Design Engineer
Billerica, MA · On-site
$214K/yr
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Quick apply
Senior Analog/Mixed-Signal IC Design Engineer
Billerica, MA · On-site
$214K/yr
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL, CTLEs, CDRs, etc. * Thorough understanding of equalization ...
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL, CTLEs, CDRs, etc. * Thorough understanding of equalization ...
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Quick apply
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL, CTLEs, CDRs, etc. * Thorough understanding of equalization ...
Quick apply
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL, CTLEs, CDRs, etc. * Thorough understanding of equalization ...
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Quick apply
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. * Must have a track record of successfully taking designs ...
Pll information
See Massachusetts salary details
$11.29 - $14.61
3% of jobs
$14.61 - $17.92
9% of jobs
$18.97 is the 25th percentile. Wages below this are outliers.
$17.92 - $21.24
42% of jobs
$21.24 - $24.56
20% of jobs
$24.91 is the 75th percentile. Wages above this are outliers.
$24.56 - $27.88
8% of jobs
$27.88 - $31.19
4% of jobs
$31.19 - $34.51
1% of jobs
$34.51 - $37.83
1% of jobs
$37.83 - $41.15
6% of jobs
$41.15 - $44.46
3% of jobs
$44.46 - $47.78
2% of jobs
$11
$25
$47
How much do pll jobs pay per hour?
As of Aug 28, 2026, the average hourly pay for pll in Massachusetts is $25.14, according to ZipRecruiter salary data. Most workers in this role earn between $18.89 and $27.02 per hour, depending on experience, location, and employer.
What is a phase-locked loop?
A Phase-Locked Loop (PLL) is an electronic circuit that synchronizes an output signal's phase and frequency with a reference signal. PLLs are essential in communication systems, radio transmitters, and frequency synthesizers because they help maintain stable and accurate frequencies. They work by continuously comparing the phase of an input signal with that of a controlled oscillator, adjusting the oscillator to match the input. PLLs are widely used in devices like clocks, radios, and wireless communication systems for signal synchronization and noise reduction.
What are the key skills and qualifications needed to thrive as a phase-locked loop engineer?
To excel as a PLL Engineer, you need a solid background in electrical engineering, analog and digital circuit design, and a relevant engineering degree. Familiarity with EDA tools like Cadence, MATLAB for simulation, and experience with semiconductor process technologies are typically required. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills in this role. These qualifications ensure precise design, simulation, and troubleshooting of PLL circuits, which are vital for reliable electronic systems.
What are some common challenges faced by process improvement leaders and how can applicants prepare for them?
Process Improvement Leaders (PILs) often encounter challenges such as resistance to change, aligning cross-functional teams, and quantifying results of implemented improvements. To prepare, applicants should develop strong communication and stakeholder management skills, as well as a solid foundation in data analysis and Lean or Six Sigma methodologies. Demonstrating adaptability and a proactive approach to overcoming obstacles will help you succeed in this dynamic role and contribute to a culture of continuous improvement.
What is the difference between Pll vs Paralegal?
| Aspect | Pll | Paralegal |
|---|---|---|
| Required Credentials | Legal education, certification (if applicable) | Associate degree or paralegal certificate |
| Work Environment | Law firms, corporate legal departments | Law firms, government agencies, corporations |
| Industry Usage | Legal industry, often specialized | Legal support roles across industries |
| Job Responsibilities | Legal research, document preparation, case management | Assisting attorneys, drafting documents, case support |
While both Pll and paralegals work in legal environments and support attorneys, Plls often have specialized legal training or certifications, focusing on legal research and case management. Paralegals typically hold formal education like an associate degree and perform a broad range of support tasks. The roles overlap in work environment and responsibilities, but Plls may have more specialized legal knowledge depending on their certification.
What are popular job titles related to Pll jobs in Massachusetts?
For Pll jobs in Massachusetts, the most frequently searched job titles are:
What job categories do people searching Pll jobs in Massachusetts look for?
The top searched job categories for Pll jobs in Massachusetts are:
Senior Principal AE-RF Design Engineer
Burlington, MA • On-site
Cadence Design Systems Inc. •
Software Development • 5 - 10K employees5,001 - 10,000 employees
9.0
Based on 5 frontline employees who took The Breakroom Quiz
34th of 246 rated software companies
Good employer
Respectful managers
Uninterrupted breaks
Full-time
Posted 24 days ago
Job description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.We're doing work that matters. Help us solve what others can't.
Experienced Millimeter-Wave (mmWave) IC designer specialize in engineering high-frequency (30 GHz+) transceivers and components for 5G/6G communications, aerospace radar, and automotive sensors. Will drive the full product lifecycle, tackling challenges like parasitic extraction, thermal management, and high-frequency electromagnetic modeling. High level of customer engagement at a fast pace on state of the art design. Requires a deep, specialized skill set:
- Building Blocks: Deep expertise in designing custom blocks such as Power Amplifiers (PAs), Low Noise Amplifiers (LNAs), mixers, and Voltage-Controlled Oscillators (VCOs).
- RF Subsystem: Deep expertise in designing Tx and Rx signal chains for noise, figure, linearity dynamic range and power efficiency. Deep experience in RF PLL design including Sigma delta, FRAC-N PLL. Phase noise and spurius signal, settling time. Experience with PLL buildng blocks such as PFD, charge pumps, dividers, multipliers.
- Architecture: Proficiency in RF transceiver architectures, direct-conversion topologies, and phased-array systems. Signal chain analysis and system figures of merit such as ACPR, EVM and BER.
- Process Technologies: Hands-on experience on advanced nodes using RF SOI process and deep knowledge of the required trade offs.
- Software Tools: Mastery of standard EDA software environments, including:
- System Simulation: VSS -
- Schematic & Simulation: Cadence Virtuoso and VRF flows
- Electromagnetic (EM) Simulation: EMX, and Clarity
- Layout & Verification: Layout MXL, QRC and Pegasus
- Education: Usually an M.Sc. or Ph.D. in Electrical Engineering (or a closely related discipline).
- Experience: 10+ years of industrial experience taking designs from conception through tape-out to final lab validation.
- Validation: Extensive lab characterization experience utilizing high-frequency equipment like spectrum analyzers, VNAs, and probe stations.
About Cadence Design Systems
Sourced by ZipRecruiter
Industry
Software development
Company size
5,001 - 10,000 Employees
Headquarters location
San Jose, CA, US
Year founded
1988
