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Physical Design Manager Jobs in Texas (NOW HIRING)

Tanisha Systems, Inc.

Physical Design Engineer

Austin, TX · On-site

$134.80K - $138.70K/yr

Chip-Level Floorplanning & Hierarchical Design - Manage top-level layout planning, pin assignments, and cross-block optimizations. * Strong scripting experience. * Clock & Power Distribution - Design ...

Apple

GPU Physical Verification Design Engineer

Austin, TX · On-site

$134.80K - $138.80K/yr

You will manage and resolve design and flow issues related to physical design, identify potential solutions and drive execution. You will need to communicate and drive the needs of Physical Design ...

Apple

GPU Physical Verification Design Engineer

Austin, TX · On-site

$134.80K - $138.70K/yr

You will manage and resolve design and flow issues related to physical design, identify potential solutions and drive execution. You will need to communicate and drive the needs of Physical Design ...

Apple

GPU Physical Verification Design Engineer

Austin, TX · On-site

$181.10K - $318.40K/yr

You will manage and resolve design and flow issues related to physical design, identify potential solutions and drive execution. You will need to communicate and drive the needs of Physical Design ...

Apple

GPU Physical Design Engineer

Austin, TX · On-site

$134.80K - $138.80K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design ... and thermal Management.Proven track record in solving complex PD and cross functional problems ...

Ambiq

Director of Physical Design

Austin, TX

Own physical design schedules, resource planning, and risk management. * Ensure first-silicon success through rigorous signoff and validation processes. * Drive tape-out readiness and post-silicon ...

Apple

GPU Physical Verification Design Engineer

Austin, TX · On-site

$181.10K - $318.40K/yr

You will manage and resolve design and flow issues related to physical design, identify potential solutions and drive execution. You will need to communicate and drive the needs of Physical Design ...

Apple

GPU Physical Design Engineer

Austin, TX · On-site

$134.80K - $138.80K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design ... and thermal Management.Proven track record in solving complex PD and cross functional problems ...

Ambiq Micro

Director of Physical Design

Austin, TX

Own physical design schedules, resource planning, and risk management. * Ensure first-silicon success through rigorous signoff and validation processes. * Drive tape-out readiness and post-silicon ...

Ambiq Micro

Director of Physical Design

Austin, TX · On-site

Own physical design schedules, resource planning, and risk management. * Ensure first-silicon success through rigorous signoff and validation processes. * Drive tape-out readiness and post-silicon ...

Analogdevices

Staff Physical Design Engineer

Austin, TX · On-site

$154.84K - $232.26K/yr

Staff Physical Design Engineer - eFPGA IP Location: San Jose, CA/ Austin,TX (Hybrid) Employment ... Genus - synthesis and constraint management * Innovus - floorplanning, placement, CTS, routing, and ...

Apple

GPU Physical Design Engineer

Austin, TX · On-site

$147.40K - $272.10K/yr

... management. Minimum Qualifications BS + 3 years of relevant experience. Experience with one or more ... physical design verification flow results. Pay & Benefits At Apple, base pay is one part of our ...

Apple

GPU Physical Design Engineer

Austin, TX · On-site

$147.40K - $272.10K/yr

... management. Minimum Qualifications BS + 3 years of relevant experience. Experience with one or more ... physical design verification flow results. Pay & Benefits At Apple, base pay is one part of our ...

Apple

GPU Physical Design Engineer

Austin, TX · On-site

$147.40K - $272.10K/yr

... management. Minimum Qualifications BS + 3 years of relevant experience. Experience with one or more ... physical design verification flow results. Pay & Benefits At Apple, base pay is one part of our ...

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See Texas salary details

$39.1K

$106.7K

$187.7K

How much do physical design manager jobs pay per year?

As of May 28, 2026, the average yearly pay for physical design manager in Texas is $106,666.00, according to ZipRecruiter salary data. Most workers in this role earn between $77,800.00 and $134,200.00 per year, depending on experience, location, and employer.

What is a Physical Design Manager job?

A Physical Design Manager oversees the physical implementation of integrated circuits (ICs), ensuring efficient design, timing closure, and power optimization. They lead a team of engineers responsible for tasks like floorplanning, place and route, clock tree synthesis, and signoff verification. Their role involves collaborating with design, verification, and manufacturing teams to meet project deadlines and performance targets. Strong technical expertise in EDA tools, process nodes, and industry standards is essential.

What are the key skills and qualifications needed to thrive in the Physical Design Manager position, and why are they important?

To thrive as a Physical Design Manager, you need a deep understanding of ASIC/SoC design flows, timing closure, floorplanning, and digital circuit fundamentals, often backed by a degree in electrical or computer engineering. Familiarity with EDA tools such as Cadence, Synopsys, or Mentor Graphics, and knowledge of industry standards like IEEE are crucial, while certifications in VLSI design can be advantageous. Strong leadership, project management abilities, and effective communication skills help in leading multidisciplinary teams and coordinating complex projects. These competencies ensure high-quality chip design delivery, efficient team performance, and on-time project completion in a fast-paced semiconductor environment.

What are some common challenges faced by Physical Design Managers, and how can they be addressed?

Physical Design Managers often encounter challenges such as managing tight project deadlines, achieving timing closure, and balancing trade-offs between power, performance, and area in chip designs. Coordination between multiple design teams and keeping up with evolving EDA tool technologies can also require effective communication and continuous learning. Proactive planning, strong technical mentorship, and fostering collaboration across teams help address these challenges. Staying up to date with industry advancements and encouraging a culture of open problem-solving are also key to overcoming common obstacles in this role.
More about Physical Design Manager jobs
What are the most commonly searched types of Physical Design jobs in Texas? The most popular types of Physical Design jobs in Texas are:
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What cities in Texas are hiring for Physical Design Manager jobs? Cities in Texas with the most Physical Design Manager job openings:
Physical Design Manager jobs near you
Infographic showing various Physical Design Manager job openings in Texas as of May 2026, with employment types broken down into 82% Full Time, 15% Part Time, 2% Contract, and 1% Nights. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution, with an average salary of $106,666 per year, or $51.3 per hour.
Physical Design Engineer

Physical Design Engineer

Tanisha Systems, Inc.

Austin, TX • On-site

$134.80K - $138.70K/yr

Other

Posted 15 days ago

Job description

Physical Design Engineer
Sunnyvale CA or Austin TX- Onsite
Fulltime / FTE
Salary: Market- Negotiable
Job Overview:
We are looking for a highly skilled Physical Design Engineer to work at block level and/or top level for high-performance ASICs, SoCs, and custom silicon chips with strong scripting skills. The ideal candidate will be responsible for various aspects of the backend VLSI design flow, including floorplanning, placement, clock tree synthesis (CTS), routing, timing closure, and sign-off verification. The role requires expertise in EDA tools, physical verification methodologies, power optimization, and performance tuning.
Key Responsibilities:
Block-Level Physical Design:
  • Floorplanning & Partitioning – Define optimal floorplan with power grid, macro placements, and congestion analysis.
  • Strong scripting experience.
  • Placement & Optimization – Perform standard cell placement, legalization, and optimization to improve area, power, and timing.
  • Clock Tree Synthesis (CTS) – Design and optimize low-skew, high-performance clock networks.
  • Routing & DRC Closure – Ensure successful global and detailed routing, meeting design rule constraints.
  • Timing Closure – Work on setup/hold timing violations, signal integrity, and cross-talk reduction using static timing analysis (STA).
  • Power & IR Drop Analysis – Optimize power planning, power integrity (IR drop, EM), and leakage reduction techniques.
Top-Level Physical Design:
  • Chip-Level Floorplanning & Hierarchical Design – Manage top-level layout planning, pin assignments, and cross-block optimizations.
  • Strong scripting experience.
  • Clock & Power Distribution – Design robust clock trees and power delivery networks (PDN).
  • Integration of IP & Sub-blocks – Ensure seamless integration of IP blocks and handle complex routing challenges.
  • Chip Assembly & Sign-Off – Perform final netlist-to-GDSII implementation, addressing physical and electrical verification.
DFT Integration – Work with Design for Test (DFT) teams to ensure scan chain connectivity and testability.

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