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Physical Design Engineer Jobs in Portland, OR (NOW HIRING)

PE Logic Design

Hillsboro, OR · Hybrid

$127K - $236K/yr

As a Principal Logic Design Engineer , you will play a pivotal role in the micro-architecture and ... Work with physical design team to understand and resolve timing, power, and congestion challenges

New

ASIC Design Engineer

Beaverton, OR · On-site

$150 - $210/hr

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... Physical Design teams * Collaborate with software and systems teams to ensure a high quality ...

As a Principal Logic Design Engineer , you will play a pivotal role in the micro-architecture and ... Work with physical design team to understand and resolve timing, power, and congestion challenges

Own front-end design quality checks and reviews to present the physical design team with high-quality RTL What we need to see: * A Masters in Computer or Electrical Engineering or equivalent ...

Own front-end design quality checks and reviews to present the physical design team with high-quality RTL What we need to see: * A Masters in Computer or Electrical Engineering or equivalent ...

As a Principal Logic Design Engineer , you will play a pivotal role in the micro-architecture and ... Work with physical design team to understand and resolve timing, power, and congestion challenges

PE Logic Design

Hillsboro, OR · On-site

$127K - $236K/yr

As a Principal Logic Design Engineer , you will play a pivotal role in the micro-architecture and ... Work with physical design team to understand and resolve timing, power, and congestion challenges

PE Logic Design

Hillsboro, OR · Hybrid

$127K - $236K/yr

As a Principal Logic Design Engineer , you will play a pivotal role in the micro-architecture and ... Work with physical design team to understand and resolve timing, power, and congestion challenges

Senior Analog Design Engineer

Hillsboro, OR · On-site

$220K/yr

Collaborate with cross-functional teams including architecture, logic, verification, physical ... engineers. The ideal candidate is self-driven, detail-oriented, and passionate about analog design ...

Principal Logic Design Engineer

Hillsboro, OR · On-site

$127.40 - $236.60/hr

As a Principal Logic Design Engineer , you will play a pivotal role in the micro-architecture and ... Work with physical design team to understand and resolve timing, power, and congestion challenges

Showing results 41-60

Physical Design Engineer information

See Portland, OR salary details

$100.7K

$150.1K

How much do physical design engineer jobs pay per year?

As of Aug 23, 2026, the average yearly pay for physical design engineer in Portland, OR is $147,843.00, according to ZipRecruiter salary data. Most workers in this role earn between $144,200.00 and $148,500.00 per year, depending on experience, location, and employer.

What is a physical design engineer?

A Physical Design Engineer is responsible for transforming logical circuit designs into a physical layout that can be manufactured as an integrated circuit (IC). They focus on key aspects like floor planning, placement, clock tree synthesis (CTS), routing, and timing closure while ensuring power and performance optimization. They work with Electronic Design Automation (EDA) tools and collaborate with front-end designers to meet design specifications. The role requires proficiency in tools such as Cadence, Synopsys, or Mentor Graphics and knowledge of processes like ASIC or SoC design.

What are the typical daily responsibilities of a physical design engineer?

As a Physical Design Engineer, your daily responsibilities typically include taking logical circuit designs and translating them into physical layouts, performing floorplanning, placement, and routing of blocks, and conducting timing closure and verification. You will use specialized EDA tools to ensure that designs meet performance, power, and area requirements, collaborating closely with design, verification, and manufacturing teams. The role also involves resolving design issues, optimizing chip layouts, and preparing design data for fabrication. Working in this position provides exposure to advanced technology nodes and the opportunity to contribute directly to the development of cutting-edge semiconductor products.

What are the key skills and qualifications needed to thrive as a physical design engineer?

To thrive as a Physical Design Engineer, you need a solid background in electrical engineering, experience with ASIC or SoC design methodologies, and a deep understanding of digital circuit fundamentals. Proficiency with EDA tools like Synopsys, Cadence, or Mentor Graphics, as well as familiarity with scripting languages and industry certifications, is highly valued. Attention to detail, effective teamwork, and strong problem-solving skills are essential soft skills for this role. These qualifications are crucial as they enable efficient chip design, ensure successful project delivery, and foster productive collaboration in complex engineering environments.

What are the most commonly searched types of Physical Design Engineer jobs in Portland, OR?

The most popular types of Physical Design Engineer jobs in Portland, OR are:

What are popular job titles related to Physical Design Engineer jobs in Portland, OR?

For Physical Design Engineer jobs in Portland, OR, the most frequently searched job titles are:

What job categories do people searching Physical Design Engineer jobs in Portland, OR look for?

The top searched job categories for Physical Design Engineer jobs in Portland, OR are:

What cities near Portland, OR are hiring for Physical Design Engineer jobs?

Cities near Portland, OR with the most Physical Design Engineer job openings:

Infographic showing various Physical Design Engineer job openings in Portland, OR as of August 2026, with employment types broken down into 1% As Needed, 75% Full Time, 18% Part Time, 1% Temporary, 4% Contract, and 1% Nights. Highlights an 97% Physical, 1% Hybrid, and 2% Remote job distribution, with an average salary of $147,843 per year, or $71.1 per hour.

PE Logic Design

Rambus

Hillsboro, OR • Hybrid

$127K - $236K/yr

Full-time

Medical, Dental, Retirement

Posted 3 days ago

New


Job description

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Principal Logic Design Engineer to join our Silicon IP (SIP) team in Hillsboro, Oregon. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. 

In this role, the candidate will be reporting to the Director of Engineering as an individual contributor. As a Principal Logic Design Engineer, you will play a pivotal role in the micro-architecture and design of our next- generation high performance and cutting-edge memory controllers for data centers and AI applications. This is a fast-growing market with high demand from tier-1 customers which gives ample opportunity for innovation and differentiation. If you like challenges and want to make a technical difference in the memory landscape during these exciting times in the semiconductor industry, this is the right opportunity for you. 

Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. 


  • Own micro-architecture definition and RTL design for critical blocks such as schedulers, command pipelines, coherency/ordering logic and system interfaces 
  • Analyze performance, power, and area (PPA) trade-offs and drive design decisions based on quantitative data 
  • Collaborate closely with verification team to shape test plans and improve verification coverage 
  • Work with physical design team to understand and resolve timing, power, and congestion challenges 
  • Work with verification team on regression failure debug and root cause, and provide RTL fix if necessary 
  • Provide technical support to FAE team on pre-sales customer engagements 
  • Provide technical support to AE team on post-sales customer deliveries 

  • Strong System Verilog/Verilog RTL design expertise 
  • Questa/Incisive/VCS simulator experience 
  • Python/Perl/TCL scripting experience 
  • Ability to learn quickly and work independently 
  • Solid communication and project management skills 
  • 10+ years of logic design experience (ASIC/FPGA) with BSEE, or  
  • 8+ years of logic design experience (ASIC/FPGA) with MSEE 

Definite Plus: 

  • ASIC synthesis, timing constraint, CDC/RDC experience 
  • UVM Verification experience 
  • Memory (HBM, LPDDR) expertise 
  • AMBA AXI or CHI design experience 

About Rambus 

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.  

Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.  

The US salary range for this full-time position is $127,400 to $236,600