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Physical Design Engineer Intern Jobs in Wayne, NJ

Jane Street

ASIC Physical Design Engineer

New York, NY · On-site

$148K - $153K/yr

About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test, and deploy advanced hardware. As part of our Ultra Low Latency team, you'll have the opportunity to ...

Jane Street

ASIC Physical Design Engineer

New York, NY

$148K - $153K/yr

About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test, and deploy advanced hardware. As part of our Ultra Low Latency team, you'll have the opportunity to ...

cxb

Software Engineer, Intern

Manhattan, NY · On-site

Reporting to the Assistant Director, Software Engineering the Software Engineer Intern builds tools ... design and build useful and maintainable tools • Create scalable, documented, and tested code ...

Breaking Ground

Software Engineer, Intern

Manhattan, NY · On-site

$54K/yr

Reporting to the Assistant Director, Software Engineering the Software Engineer Intern builds tools ... design and build useful and maintainable tools • Create scalable, documented, and tested code ...

Pace

Design Engineer

Manhattan, NY · On-site

They are seeking a Design Engineer to bridge design and code, shaping the user experience and ... intern+) or CS coursework • Stay current with frontend engineering trends Company : Pace is a ...

Citadel Securities

FPGA Engineer (Intern)

Manhattan, NY · On-site

$4.3K - $4.8K/wk

FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help optimize trading system performance. As an intern, you'll get to challenge the impossible in technology ...

N1

Software Engineer Intern (Fullstack)

New York, NY · On-site

Position Overview: We're seeking a Software Engineer intern, Full-Stack to join our engineering ... An eye for good front-end design * Strong experience with React/TypeScript/NodeJS/Next, and ...

Altanova

Energy Engineer Intern

New York, NY · On-site

$18.25 - $23.75/hr

... design and technologies to make the built environment truly sustainable. You will have exposure to ... Bachelor's degree minimum in mechanical engineering, building science, or related field.

Altanova

Energy Engineer Intern

New York, NY · On-site

$18.25 - $23.75/hr

... design and technologies to make the built environment truly sustainable. You will have exposure to ... Bachelor's degree minimum in mechanical engineering, building science, or related field.

Altanova

Energy Engineer Intern

New York, NY · On-site

$18.25 - $23.75/hr

... design and technologies to make the built environment truly sustainable. You will have exposure to ... Bachelor's degree minimum in mechanical engineering, building science, or related field.

Normal Computing

Hardware Engineer, RTL

New York, NY · On-site

$200K - $400K/yr

The Role As an RTL Design Engineer at Normal, you will design and verify the digital logic at the ... Physical Design Collaboration : Collaborate with physical design on timing closure, floorplanning ...

Pace

Design Engineer

New York, NY · On-site

What makes a Design Engineer different from a Product Designer? Both roles care deeply about craft ... Have an engineering background - whether frontend experience (intern+) or CS coursework * Stay ...

Pace

Design Engineer

New York, NY · On-site

What makes a Design Engineer different from a Product Designer? Both roles care deeply about craft ... Have an engineering background - whether frontend experience (intern+) or CS coursework * Stay ...

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All JobsPhysical Design Engineer Intern JobsPhysical Design Engineer Intern Jobs in Wayne, NJ

Physical Design Engineer Intern information

See Wayne, NJ salary details

$10

$19

$29

How much do physical design engineer intern jobs pay per hour?

As of Aug 18, 2026, the average hourly pay for physical design engineer intern in Wayne, NJ is $19.16, according to ZipRecruiter salary data. Most workers in this role earn between $15.96 and $20.72 per hour, depending on experience, location, and employer.

What does a physical design engineer intern do?

A Physical Design Engineer Intern assists in the process of transforming a circuit design (RTL) into a real, manufacturable layout for semiconductor chips. They work on tasks such as floorplanning, placement, routing, timing analysis, and verifying that the chip design meets all physical and electrical requirements. Interns typically use electronic design automation (EDA) tools to perform these tasks and collaborate with experienced engineers. Their work is crucial in ensuring that chips are both functional and manufacturable at scale.

What skills and qualifications are needed to thrive as a physical design engineer intern?

To thrive as a Physical Design Engineer Intern, you generally need a solid background in electrical engineering, digital circuit design, and semiconductor fundamentals, often supported by ongoing university studies in a related field. Familiarity with industry-standard EDA tools such as Cadence, Synopsys, or Mentor Graphics, as well as scripting languages like TCL or Python, is highly valuable. Attention to detail, problem-solving abilities, and effective teamwork are crucial soft skills for excelling in this role. These skills and qualifications are important because they ensure accurate chip layouts, efficient workflows, and successful collaboration within complex engineering teams.

What types of projects and tasks can a physical design engineer intern expect to work on during their internship?

As a Physical Design Engineer Intern, you will typically be involved in supporting the design and verification of integrated circuits at the physical level. Common tasks include assisting with floorplanning, placement and routing, timing analysis, and running design rule checks using industry-standard EDA tools. You may also participate in team meetings, collaborate with senior engineers, and help resolve issues related to power, performance, and area optimization. These hands-on experiences are designed to help you build practical skills and gain a deeper understanding of the physical design flow in VLSI chip development.

What is the difference between Physical Design Engineer Intern vs Digital Design Engineer Intern?

AspectPhysical Design Engineer InternDigital Design Engineer Intern
Required CredentialsTypically pursuing or holding a degree in Electrical Engineering or Computer EngineeringTypically pursuing or holding a degree in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning and implementing physical chip layouts, working with EDA toolsDesigning digital logic circuits, working on HDL coding and simulation
Industry UsageFoundries, semiconductor companies, integrated circuit design firmsSemiconductor companies, integrated circuit design firms, tech companies

Physical Design Engineer Interns focus on translating digital logic designs into physical layouts for chips, working closely with EDA tools. Digital Design Engineer Interns concentrate on creating and simulating digital logic circuits using hardware description languages. Both roles are essential in chip development but differ in their specific tasks and focus areas.

What are popular job titles related to Physical Design Engineer Intern jobs in Wayne, NJ?

For Physical Design Engineer Intern jobs in Wayne, NJ, the most frequently searched job titles are:

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The top searched job categories for Physical Design Engineer Intern jobs in Wayne, NJ are:

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Cities near Wayne, NJ with the most Physical Design Engineer Intern job openings:

Physical Design Engineer Intern jobs near you

ASIC Physical Design Engineer

Jane Street

New York, NY • On-site

$148K - $153K/yr

Full-time

Re-posted 19 days ago

Job description

About the Position
We are looking to hire an ASIC Physical Design Engineer to help us design, test, and deploy advanced hardware. As part of our Ultra Low Latency team, you'll have the opportunity to collaborate with people in areas across the firm, including trading, networking, and research infrastructure.
This isn't a traditional PD role. We're a small team where everyone works across the chip design process, and we expect our PD engineers to lead with physical design expertise but think like chip designers. You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and reason about design decisions that cross the front-end/back-end boundary.
If you've spent your career exclusively in PD, this probably isn't the right fit- but if you've worked across the stack, either because you started as an RTL designer and moved into PD, or because you were on a smaller team where you had to wear multiple hats, we'd love to talk.
We're big believers in the ability of tools to improve the productivity, reliability, and day-to-day joy of hardware engineering. That's why we created Hardcaml, a hardware development toolchain embedded in OCaml. We don't expect you to know OCaml (we'll teach you here), but we are looking for hardware engineers who are excited about the advantages that better tools can bring, and are willing to try new things as a result.
About You
  • You have 8+ years hands-on experience building and running modern physical design flows (e.g., floor planning, place and route, timing closure, physical verification, power analysis)
  • You don't need to have optimized every last detail of every flow, but you should have broad enough experience across PD that you can own a flow end-to-end and know where the risks are
  • Beyond PD, you can read and write RTL and understand how front-end design decisions affect physical implementation-and vice versa; You think about physical design in the context of the overall chip, not just as a downstream consumer of a netlist
  • You're interested in using software engineering techniques to improve the hardware design process, and you have experience programming in a high-level language (Python, C++, Haskell, etc.)

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