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Physical Design Engineer Intern Jobs in Silverton, OR

Actalent

PCB Design Engineer

Tualatin, OR

Sr. PCB Design Engineer This Sr. PCB Design Engineer role focuses on end-to-end development of ... Set up and maintain electrical, physical, and DFM design rules within Constraint Manager to support ...

Reli Group Inc

Power BI Intern

Salem, OR · On-site

$15/hr

Document processes and contribute to best practices in dashboard design and data governance ... physical or mental disability, medical condition, marital status, sex, sexual orientation, gender ...

Reli Group Inc

Power BI Intern

Salem, OR · On-site

$15/hr

Document processes and contribute to best practices in dashboard design and data governance ... physical or mental disability, medical condition, marital status, sex, sexual orientation, gender ...

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All JobsPhysical Design Engineer Intern JobsPhysical Design Engineer Intern Jobs in Silverton, OR

Physical Design Engineer Intern information

See Silverton, OR salary details

$10

$19

$29

How much do physical design engineer intern jobs pay per hour?

As of Aug 26, 2026, the average hourly pay for physical design engineer intern in Silverton, OR is $19.07, according to ZipRecruiter salary data. Most workers in this role earn between $15.91 and $20.67 per hour, depending on experience, location, and employer.

What does a physical design engineer intern do?

A Physical Design Engineer Intern assists in the process of transforming a circuit design (RTL) into a real, manufacturable layout for semiconductor chips. They work on tasks such as floorplanning, placement, routing, timing analysis, and verifying that the chip design meets all physical and electrical requirements. Interns typically use electronic design automation (EDA) tools to perform these tasks and collaborate with experienced engineers. Their work is crucial in ensuring that chips are both functional and manufacturable at scale.

What skills and qualifications are needed to thrive as a physical design engineer intern?

To thrive as a Physical Design Engineer Intern, you generally need a solid background in electrical engineering, digital circuit design, and semiconductor fundamentals, often supported by ongoing university studies in a related field. Familiarity with industry-standard EDA tools such as Cadence, Synopsys, or Mentor Graphics, as well as scripting languages like TCL or Python, is highly valuable. Attention to detail, problem-solving abilities, and effective teamwork are crucial soft skills for excelling in this role. These skills and qualifications are important because they ensure accurate chip layouts, efficient workflows, and successful collaboration within complex engineering teams.

What types of projects and tasks can a physical design engineer intern expect to work on during their internship?

As a Physical Design Engineer Intern, you will typically be involved in supporting the design and verification of integrated circuits at the physical level. Common tasks include assisting with floorplanning, placement and routing, timing analysis, and running design rule checks using industry-standard EDA tools. You may also participate in team meetings, collaborate with senior engineers, and help resolve issues related to power, performance, and area optimization. These hands-on experiences are designed to help you build practical skills and gain a deeper understanding of the physical design flow in VLSI chip development.

What is the difference between Physical Design Engineer Intern vs Digital Design Engineer Intern?

AspectPhysical Design Engineer InternDigital Design Engineer Intern
Required CredentialsTypically pursuing or holding a degree in Electrical Engineering or Computer EngineeringTypically pursuing or holding a degree in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning and implementing physical chip layouts, working with EDA toolsDesigning digital logic circuits, working on HDL coding and simulation
Industry UsageFoundries, semiconductor companies, integrated circuit design firmsSemiconductor companies, integrated circuit design firms, tech companies

Physical Design Engineer Interns focus on translating digital logic designs into physical layouts for chips, working closely with EDA tools. Digital Design Engineer Interns concentrate on creating and simulating digital logic circuits using hardware description languages. Both roles are essential in chip development but differ in their specific tasks and focus areas.

What job categories do people searching Physical Design Engineer Intern jobs in Silverton, OR look for?

The top searched job categories for Physical Design Engineer Intern jobs in Silverton, OR are:

What cities near Silverton, OR are hiring for Physical Design Engineer Intern jobs?

Cities near Silverton, OR with the most Physical Design Engineer Intern job openings:

Physical Design Engineer Intern jobs near you
Infographic showing various Physical Design Engineer Intern job openings in Silverton, OR as of August 2026, with employment types broken down into 1% As Needed, 78% Full Time, 16% Part Time, 4% Contract, and 1% Nights. Highlights an 95% Physical, 1% Hybrid, and 4% Remote job distribution, with an average salary of $39,672 per year, or $19.1 per hour.

Semiconductor Design Engineer (Compute Test, Oregon)

Tualatin, OR

Teradyne
Manufacturing • 1 - 5K employees
Learn more about Teradyneexternal

$154K - $247K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 8 days ago

Job description

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world!

We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.

Our Purpose
TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day.
We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team - one that makes better decisions, drives innovation and delivers better business results.
Opportunity Overview
The Semiconductor Design Engineer will play a key role within Teradyne's Compute Test Division Engineering team, focusing on the development of advanced test instrumentation. This role supports architecture, design, implementation, verification, and lab validation in a dynamic, multi-site engineering environment. The ideal candidate will bring strong digital logic design expertise, hands-on FPGA experience, and the ability to collaborate across hardware, software, systems, and verification teams.

  • Lead architecture, design, implementation, verification, and lab validation for test instruments and systems.
  • Develop scalable, high-performance, high-quality, extensible, and maintainable digital design solutions.
  • Collaborate with hardware, software, systems, and design verification teams to define requirements and achieve appropriate test coverage.
  • Build and execute product integration, verification testing, debug, prototyping, and characterization experiments.
  • Mentor junior engineers and provide technical leadership for FPGA project teams.
  • Support logic design process improvement initiatives and tool evaluations to sustain engineering excellence and product quality.

 

All About You
We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you're ready to join us in this mission, take a closer look at the minimum criteria for the position.

  • BS in Electrical Engineering or a related field required; advanced degree preferred.
  • Minimum of 10 years of practical hardware development experience.
  • Primary experience in digital logic design and FPGA physical design, including floor-planning, place and route, and static timing analysis.
  • Expertise with Verilog and a scripting language such as Python, TCL, or PERL.
  • Experience with Xilinx and/or Intel FPGAs; standard cell ASIC design experience preferred.
  • Familiarity with SystemVerilog, UVM, VHDL, C, and C++ preferred.
  • Working knowledge of PCIe, AXI, DDRx, SERDES, USB, I2C, SPI, 10/100GE, PLL, HBM, DLL, ADC, DAC, MIPI, DisplayPort, and PRBS technologies.
  • Experience with Windows and Linux operating systems, as well as development tools including Cadence Xcelium, Synopsys SpyGlass CDC/LINT, Xilinx Vivado, Intel Quartus, ClearCase, Git, SVN, JIRA, and continuous integration methodologies.
  • Understanding of design for high-speed signal integrity.
  • Excellent troubleshooting, debugging, and problem-solving skills.
  • Strong verbal, written, and presentation skills.
  • Experience working in cross-functional teams designing complex systems.
  • Commitment to excellence, efficiency, mentorship, and product quality.


Compensation:
The base salary range for this role is $154,900-$247,800. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.
Incentive Plan: This job is eligible for discretionary bonus(es) based on financial performance.

Benefits:
Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more. Please click here to see details.
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