About the Role As a Senior Physical Design Engineer, you will play a key role in the implementation and delivery of complex digital and mixed-signal IC designs. You will work across the physical ...
About the Role As a Senior Physical Design Engineer, you will play a key role in the implementation and delivery of complex digital and mixed-signal IC designs. You will work across the physical ...
SoC Physical Design Engineer, PnR
$134K - $249K/yr
We are seeking a seasoned Physical Design technical leader with deep expertise in high-performance & low-power design. In this highly visible role, you will work closely with cross-functional teams ...
SoC Physical Design Engineer, PnR
$134K - $249K/yr
We are seeking a seasoned Physical Design technical leader with deep expertise in high-performance & low-power design. In this highly visible role, you will work closely with cross-functional teams ...
As a Design Verification Engineer Intern on the SoC Digital Verification team, you will help ensure the functional correctness and robustness of Tenstorrent's next-generation RISCV and AI accelerator ...
As a Design Verification Engineer Intern on the SoC Digital Verification team, you will help ensure the functional correctness and robustness of Tenstorrent's next-generation RISCV and AI accelerator ...
Senior CPU Design Engineer
Westford, MA ยท Hybrid
You will work closely with fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks. What you will be doing: * Drive the micro-architecture ...
Senior CPU Design Engineer
Westford, MA ยท Hybrid
You will work closely with fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks. What you will be doing: * Drive the micro-architecture ...
SoC Physical Design Engineer, PnR
$116K - $175K/yr
Description In Physical Design, you will be at the center of design effort collaborating with architecture, CAD, timing and logic design teams, with a critical impact on delivering best in class ...
SoC Physical Design Engineer, PnR
$116K - $175K/yr
Description In Physical Design, you will be at the center of design effort collaborating with architecture, CAD, timing and logic design teams, with a critical impact on delivering best in class ...
As a Design Verification Engineer Intern on the SoC Digital Verification team, you will help ensure the functional correctness and robustness of Tenstorrent's next-generation RISC-V and AI ...
As a Design Verification Engineer Intern on the SoC Digital Verification team, you will help ensure the functional correctness and robustness of Tenstorrent's next-generation RISC-V and AI ...
SoC Physical Design Engineer, STA/Timing
Waltham, MA ยท On-site
$146K - $151K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Minimum Qualifications Minimum BS and 10+ years of relevant industry experience Strong programming ...
SoC Physical Design Engineer, STA/Timing
Waltham, MA ยท On-site
$146K - $151K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Minimum Qualifications Minimum BS and 10+ years of relevant industry experience Strong programming ...
Substation Physical Engineer
Framingham, MA ยท On-site
$101K - $129K/yr
Candidates will be expected to use knowledge of digital logic design, AC and DC circuits to design ... Engineer Intern ("EI" or "EIT") professional certification. * Professional Engineer ("PE") License.
Substation Physical Engineer
Framingham, MA ยท On-site
$101K - $129K/yr
Candidates will be expected to use knowledge of digital logic design, AC and DC circuits to design ... Engineer Intern ("EI" or "EIT") professional certification. * Professional Engineer ("PE") License.
Substation Physical Engineer
Framingham, MA ยท On-site
$101K - $129K/yr
Candidates will be expected to use knowledge of digital logic design, AC and DC circuits to design ... Engineer Intern ("EI" or "EIT") professional certification. * Professional Engineer ("PE") License.
Substation Physical Engineer
Framingham, MA ยท On-site
$101K - $129K/yr
Candidates will be expected to use knowledge of digital logic design, AC and DC circuits to design ... Engineer Intern ("EI" or "EIT") professional certification. * Professional Engineer ("PE") License.
Substation Physical Engineer
$101K - $129K/yr
Candidates will be expected to use knowledge of digital logic design, AC and DC circuits to design ... Engineer Intern ("EI" or "EIT") professional certification. * Professional Engineer ("PE") License.
Substation Physical Engineer
$101K - $129K/yr
Candidates will be expected to use knowledge of digital logic design, AC and DC circuits to design ... Engineer Intern ("EI" or "EIT") professional certification. * Professional Engineer ("PE") License.
SoC Physical Design Engineer, STA/Timing
$165K - $292K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Minimum Qualifications Minimum BS and 10+ years of relevant industry experience Strong programming ...
SoC Physical Design Engineer, STA/Timing
$165K - $292K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Minimum Qualifications Minimum BS and 10+ years of relevant industry experience Strong programming ...
Staff Analog Design Engineer (AMS)
Wilmington, MA ยท On-site
$220K/yr
ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable ... Staff Analog Design Engineer As a Staff Analog Design Engineer at Analog Devices, you will lead the ...
Staff Analog Design Engineer (AMS)
Wilmington, MA ยท On-site
$220K/yr
ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable ... Staff Analog Design Engineer As a Staff Analog Design Engineer at Analog Devices, you will lead the ...
Staff Analog Design Engineer (AMS)
Wilmington, MA ยท On-site
$131 - $190/hr
ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable ... Staff Analog Design Engineer As a Staff Analog Design Engineer at Analog Devices, you will lead the ...
Staff Analog Design Engineer (AMS)
Wilmington, MA ยท On-site
$131 - $190/hr
ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable ... Staff Analog Design Engineer As a Staff Analog Design Engineer at Analog Devices, you will lead the ...
Staff Analog Design Engineer (AMS)
Wilmington, MA ยท On-site
$220K/yr
ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable ... Staff Analog Design Engineer As a Staff Analog Design Engineer at Analog Devices, you will lead the ...
Staff Analog Design Engineer (AMS)
Wilmington, MA ยท On-site
$220K/yr
ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable ... Staff Analog Design Engineer As a Staff Analog Design Engineer at Analog Devices, you will lead the ...
Advanced ASIC Physical Design Lead (Teradyne, North Reading, MA)
North Reading, MA ยท On-site
$192K - $307K/yr
Lead and mentor a team of physical design engineers across the full project lifecycle * Lead high-level physical design planning and define PD architecture in collaboration with chip and system ...
Advanced ASIC Physical Design Lead (Teradyne, North Reading, MA)
North Reading, MA ยท On-site
$192K - $307K/yr
Lead and mentor a team of physical design engineers across the full project lifecycle * Lead high-level physical design planning and define PD architecture in collaboration with chip and system ...
Advanced ASIC Physical Design Lead (Teradyne, North Reading, MA)
Reading, MA ยท On-site
$192K - $307K/yr
Lead and mentor a team of physical design engineers across the full project lifecycle * Lead high-level physical design planning and define PD architecture in collaboration with chip and system ...
Advanced ASIC Physical Design Lead (Teradyne, North Reading, MA)
Reading, MA ยท On-site
$192K - $307K/yr
Lead and mentor a team of physical design engineers across the full project lifecycle * Lead high-level physical design planning and define PD architecture in collaboration with chip and system ...
Senior VLSI Physical Design Integration Engineer
Westford, MA ยท On-site
$136 - $264.50/hr
NVIDIA is seeking an outstanding Senior VLSI Physical Design Integration Engineer who is dedicated to collaborating closely with our teams in the USA, Israel, and India. As a valued member of our ...
Senior VLSI Physical Design Integration Engineer
Westford, MA ยท On-site
$136 - $264.50/hr
NVIDIA is seeking an outstanding Senior VLSI Physical Design Integration Engineer who is dedicated to collaborating closely with our teams in the USA, Israel, and India. As a valued member of our ...
Sr. Staff Physical Design Timing Engineer (STA)
$147K - $152K/yr
About this role We are hiring a Physical Design Timing Engineer to help drive backend digital execution for some of the leading photonics based interconnect solutions. You will work alongside a team ...
Sr. Staff Physical Design Timing Engineer (STA)
$147K - $152K/yr
About this role We are hiring a Physical Design Timing Engineer to help drive backend digital execution for some of the leading photonics based interconnect solutions. You will work alongside a team ...
System Integration Engineer Intern
Wilmington, MA ยท On-site
$22 - $41/hr
ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable ... Basic PCB design skills (schematic capture and layout) * Electronics lab skills (e.g., soldering)
New
System Integration Engineer Intern
Wilmington, MA ยท On-site
$22 - $41/hr
ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable ... Basic PCB design skills (schematic capture and layout) * Electronics lab skills (e.g., soldering)
New
Sr. Staff Physical Design Timing Engineer (STA)
Boston, MA ยท On-site
$217K - $267K/yr
About this role We are hiring a Physical Design Timing Engineer to help drive backend digital execution for some of the leading photonics based interconnect solutions. You will work alongside a team ...
Sr. Staff Physical Design Timing Engineer (STA)
Boston, MA ยท On-site
$217K - $267K/yr
About this role We are hiring a Physical Design Timing Engineer to help drive backend digital execution for some of the leading photonics based interconnect solutions. You will work alongside a team ...
Physical Design Engineer Intern information
See Boston, MA salary details
$12.01 - $13.84
2% of jobs
$13.84 - $15.67
4% of jobs
$17.50 is the 25th percentile. Wages below this are outliers.
$15.67 - $17.50
19% of jobs
$17.50 - $19.33
24% of jobs
The median wage is $19.44 / hr.
$19.33 - $21.15
17% of jobs
$22.25 is the 75th percentile. Wages above this are outliers.
$21.15 - $22.98
16% of jobs
$22.98 - $24.81
6% of jobs
$24.81 - $26.64
5% of jobs
$26.64 - $28.47
3% of jobs
$28.47 - $30.29
3% of jobs
$30.29 - $32.12
1% of jobs
$12
$20
$32
How much do physical design engineer intern jobs pay per hour?
What does a physical design engineer intern do?
What skills and qualifications are needed to thrive as a physical design engineer intern?
What types of projects and tasks can a physical design engineer intern expect to work on during their internship?
What is the difference between Physical Design Engineer Intern vs Digital Design Engineer Intern?
| Aspect | Physical Design Engineer Intern | Digital Design Engineer Intern |
|---|---|---|
| Required Credentials | Typically pursuing or holding a degree in Electrical Engineering or Computer Engineering | Typically pursuing or holding a degree in Electrical Engineering or Computer Engineering |
| Work Environment | Designing and implementing physical chip layouts, working with EDA tools | Designing digital logic circuits, working on HDL coding and simulation |
| Industry Usage | Foundries, semiconductor companies, integrated circuit design firms | Semiconductor companies, integrated circuit design firms, tech companies |
Physical Design Engineer Interns focus on translating digital logic designs into physical layouts for chips, working closely with EDA tools. Digital Design Engineer Interns concentrate on creating and simulating digital logic circuits using hardware description languages. Both roles are essential in chip development but differ in their specific tasks and focus areas.
What are the most commonly searched types of Physical Design Engineer jobs in Boston, MA?
The most popular types of Physical Design Engineer jobs in Boston, MA are:
What are popular job titles related to Physical Design Engineer Intern jobs in Boston, MA?
For Physical Design Engineer Intern jobs in Boston, MA, the most frequently searched job titles are:
- Summer Aerospace Engineer
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What job categories do people searching Physical Design Engineer Intern jobs in Boston, MA look for?
The top searched job categories for Physical Design Engineer Intern jobs in Boston, MA are:
- Robotics Engineering Intern
- Intern Web Developer Internship
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What cities near Boston, MA are hiring for Physical Design Engineer Intern jobs?
Cities near Boston, MA with the most Physical Design Engineer Intern job openings:

Full-time
Medical, Dental, Vision, Retirement, PTO
Posted 24 days ago
Job description
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.comand on LinkedIn and X.
About the Role
As a Senior Physical Design Engineer, you will play a key role in the implementation and delivery of complex digital and mixed-signal IC designs. You will work across the physical design flow, from floorplanning through place-and-route, timing closure, physical verification, and tapeout support, helping turn architectural and RTL intent into robust silicon implementation. This role requires strong technical depth in physical design, the ability to solve complex implementation challenges, and effective collaboration with cross-functional teams across the development cycle.
Key Responsibilities
- Own physical design implementation for complex digital blocks and subsystems, including floorplanning, placement, clock tree synthesis, routing, and physical optimization
- Drive timing closure, congestion analysis, power optimization, and area improvement across assigned blocks or subsystems
- Perform physical verification activities including DRC, LVS, ERC, and reliability checks in collaboration with relevant teams
- Develop and refine physical design constraints, scripts, and flow improvements to improve quality and execution efficiency
- Collaborate closely with RTL, design verification, DFT, STA, library, and package teams to resolve design and implementation issues
- Support block-level and top-level integration activities, including interface planning, timing constraint alignment, and implementation readiness
- Analyze and debug timing, signal integrity, power, and physical implementation issues across the full backend flow
- Contribute to methodology improvements and help establish best practices for physical design execution
- Participate in design reviews and provide clear technical input on implementation trade-offs, risks, and readiness
- Author and maintain documentation for design implementation, constraints, flows, and signoff status
- Mentor junior engineers on physical design practices, tool usage, and debugging approaches
- Support tapeout planning and execution activities to ensure high-quality delivery against project milestones
Must Have Skills
- Strong experience in physical design for ASIC/SoC development, including successful implementation through tapeout
- Expertise in floorplanning, place-and-route, clock tree synthesis, timing closure, and physical verification
- Strong understanding of timing analysis, constraints, signal integrity, power optimization, and physical design trade-offs
- Experience with industry-standard physical design and signoff tools, including Cadence-based flows
- Scripting experience in TCL, Python, or similar languages for automation and flow improvement
- Experience collaborating across cross-functional teams including RTL, STA, DFT, design verification, and package or product engineering
- Strong problem-solving and debug skills across backend implementation challenges
- Clear communication and technical documentation skills
- Demonstrated ability to independently drive complex blocks or major implementation workstreams
Preferred Qualifications
- Experience with advanced-node implementation and low-power design methodologies
- Familiarity with mixed-signal integration considerations and top-level implementation challenges
- Experience improving backend flows, automation, or methodology
- Prior mentoring experience or informal technical leadership on project execution
Preferred Education and Experience
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, or an equivalent combination of education and 5+ years of related experience
- Master's degree in Electrical Engineering, Computer Engineering, or related field, or an equivalent combination of education and 5+ years of related experience
We recognize that candidates may not meet every listed requirement. If you bring relevant experience and a willingness to learn, we encourage you to apply.
#LI-PG1
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law.
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $116,960 to $160,820.Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.
This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.
This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.