Performance Tuning Jobs in California (NOW HIRING)

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In this highly visible role, you will be at the center of a chip design effort collaborating with all subject areas, with a critical impact on getting functional products to millions of customers quickly. You will be responsible for silicon performance verification, correlation, characterization and tuning for CPUs. The role involves pre-silicon performance verification as well as developing tests to characterize CPU performance, analyzing and profiling software/applications, correlating and comparing performance across silicon/system software version, and working with OS and compiler teams on performance debug and tuning.
Description
As a CPU Processor Performance Verification Engineer owning the verification of a certain area of performance features in a chip design, you will have responsibilities as follows:
• Work closely with architects and RTL designers on verifying the performance features of the design and correlating with performance models (both pre-silicon and post-silicon)
• Work closely with software and application developers on identifying performance bottlenecks and tuning the software
• Develop test plans and test infrastructure/tools for performance tuning, correlation, and verification
• Improve and maintain the architectural performance models
• Develop tests in assembly, C/C++, or vectors to debug and correlate the RTL and performance model
• Develop C or Verilog-based checkers for verifying the performance features
• Develop coverage monitors and analyze coverage to ensure all performance features are covered
• Debug performance issues and conduct performance tuning on silicon
• Benchmark, correlate and compare CPU performance across silicon/OS/compiler versions
• Present CPU performance results to multi-functional teams
• Work closely with OS and compiler teams on system and application performance tuning
Preferred Qualifications
Experience in benchmark and workload analysis and CPU performance profiling
Knowledge of compiler techniques and OS for performance optimization
Knowledge in developing instruction profiling tools on silicon
Experience in performance modeling for advanced CPU designs
Experience in silicon validation
Ability to work across teams to optimize silicon performance
Should be a great teammate with excellent communication and presentation skills and able to work independently on the owned unit
Minimum Qualifications
Minimum BS and 10+ years of relevant industry experience
Performance modeling, processor verification, or RTL design experience
Experience in digital logic design, CPU architecture, and microarchitecture
Experience in developing performance test plans and writing/debugging assembly tests for performance correlation and verification
Programming skills in assembly, C/C++, Verilog, System Verilog, or scripting
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $184,700 and $324,800, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.