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Palladium Salaries Jobs (NOW HIRING)

K2 Space

Senior ASIC Emulation Engineer

Seattle, WA · On-site

$170K - $250K/yr

Hands-on expertise with major emulation platforms (Palladium, ZeBu, Veloce), including model build ... Salary will be based on several factors including, but not limited to: knowledge and skills ...

K2 Space

Senior ASIC Emulation Engineer

Seattle, WA

$170K - $250K/yr

Hands-on expertise with major emulation platforms (Palladium, ZeBu, Veloce), including model build ... Salary will be based on several factors including, but not limited to: knowledge and skills ...

Cisco

ASIC DFT Emulation Technical Lead

San Jose, CA · On-site

$186K - $267K/yr

Prior emulation experience on platforms such as Palladium, Veloce, or Zebu as well as experience ... The starting salary range posted for this position is $186,900.00 to $267,700.00 and reflects the ...

Cisco

ASIC DFT Emulation Technical Lead

San Jose, CA · On-site

$186K - $267K/yr

Prior emulation experience on platforms such as Palladium, Veloce, or Zebu as well as experience ... The starting salary range posted for this position is $186,900.00 to $267,700.00 and reflects the ...

Velaura

Senior Emulation Engineer

Santa Clara, CA · On-site

$200K - $500K/yr

Set up, own, and maintain emulation flows for the Velaura SoC on Palladium, Veloce, and/or Zebu ... Compensation for this role includes a competitive base salary, performance-based incentives, and ...

Cadence Design Systems Inc.

Design Engineer I

Cary, IL · On-site

$88K - $165K/yr

... Palladium platform... As such we are seeking an experienced DFT engineer which role will span ... The annual salary range for California is $88,900 to $165,100. You may also be eligible to receive ...

Velaura

Senior Emulation Engineer

Santa Clara, CA · On-site

$200K - $500K/yr

Set up, own, and maintain emulation flows for the Velaura SoC on Palladium, Veloce, and/or Zebu ... Compensation for this role includes a competitive base salary, performance-based incentives, and ...

Astera Labs

Principal Emulation Engineer

San Jose, CA · On-site

$209K - $230K/yr

... Palladium/Zebu/Veloce or HAPS and FPGA prototyping. * Experience in modeling for emulation and prototyping, and/or non-UVM environments The base salary range is $209,000.00 USD - $230,000.00 USD.

Broadcom, Inc.

RTL integration Engineer

San Jose, CA · On-site

Additionally, the candidate will handle synthesis, palladium modeling, and STA support. Strong ... Compensation and Benefits The annual base salary range for this position is USD 143,800.00 To USD ...

Broadcom

RTL integration Engineer

San Jose, CA · On-site

Additionally, the candidate will handle synthesis, palladium modeling, and STA support. Strong ... Compensation and Benefits The annual base salary range for this position is USD 143,800.00 To USD ...

Arteris

Emulation Engineer

Campbell, CA

Palladium, Veloce, or Zebu, as well as experience with compilation, debug, performance, and ... Estimated Base Salary:  $150,000 - $190,000 Annually About Arteris: Arteris is a leading ...

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How much do palladium salaries jobs pay per hour?

As of Sep 2, 2026, the average hourly pay for palladium salaries in the United States is $20.75, according to ZipRecruiter salary data. Most workers in this role earn between $18.27 and $22.12 per hour, depending on experience, location, and employer.

What is the difference between Palladium Salaries vs Environmental Scientist Salaries?

AspectPalladium SalariesEnvironmental Scientist Salaries
Required CredentialsBachelor's or Master's in relevant fields, often with consulting experienceBachelor's or Master's in Environmental Science, with some roles requiring certifications
Work EnvironmentConsulting firms, project sites, officesResearch labs, government agencies, consulting firms
Industry UsageManagement consulting, development projectsEnvironmental assessment, research, policy

While Palladium salaries typically reflect consulting and project management roles in development and social impact sectors, Environmental Scientist salaries are more focused on research, environmental assessment, and policy work. Both roles require relevant degrees, but their work environments and industry applications differ, influencing salary ranges accordingly.

What cities are hiring for Palladium Salaries jobs?

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What states have the most Palladium Salaries jobs?

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Palladium Salaries jobs near you
Infographic showing various Palladium Salaries job openings in the United States as of August 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $43,156 per year, or $20.7 per hour.

Principal Product Engineer - Virtual Protocols

Cadence Design Systems, Inc.

San Jose, CA • On-site, Remote

$136K - $253K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 24 days ago

Cadence Design Systems rating

9.0

Company rating: 9.0 out of 10

Based on 5 frontline employees who took The Breakroom Quiz

33rd of 247 rated software companies

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Business Overview
Deliver Emulation and Prototyping assisted verification products using virtualization (SW) technologies to accelerate and shift left SW-driven pre-silicon verification of advanced SoC designs.
Job Description
This Principal Product Engineer position is with the Virtual Protocols Product Engineering Team, responsible for the successful field readiness and customer deployment of our Transaction Based Acceleration and Virtual Emulation-based System Verification products. This position presents exciting opportunities and challenges of becoming an expert in System Level Software Driven Verification use models that leverage advanced protocol engines operating on Cadence's Palladium and Protium Emulation products to enable the critical shift-left of System Level SOC verification and Validation for Cadence customers. This position provides opportunities to expand your software, hardware, and advanced protocol knowledge while engaging with the world's most advanced SOC customers.
Team
The Virtual Protocols Product Engineering team works closely with R&D, the Cadence Field team, and directly with key customers to identify product requirements.
  • You will be an essential partner to the R&D team delivering product feature definition and product feedback.
  • You will be a leveraged asset for the field and marketing teams to demonstrate our product's performance, debugging, and functionality value.
  • You will become a trusted advocate for top Cadence customers helping guide them to the best use of Cadence technologies while also capturing their needs back into R&D.

As part of this team, your responsibilities will include a wide range of activities that will give you the opportunities to sharpen Cadence products and your technical skills across Software development, Hardware Design, debug tools and methodologies, and advanced protocol interfaces.
This team is responsible for the following:
  • Developing, Maintaining, and delivering feature-based training for new products/features
  • Delivering critical knowledge and guidance to customers and field teams enabling customer success using Cadence emulation platforms and products.
  • Deploying new and emerging protocol products to bleeding-edge innovative customers working on advanced SOC and System designs

Position
The Virtual Protocol Principal Product Engineer has the opportunity to be an expert in many different areas based on their interests and career goals. Their responsibilities can be but are not limited to:
  • Using expertise in OS, kernel, and driver SW development to support Cadence VirtualBridge products that combine a Virtual Machine running a production OS with the customer's SOC Design running on Cadence's Palladium emulation or Protium Prototyping platforms.
  • Using Verification methodologies and SW development expertise to help customers utilize Cadence's Accelerated Verification IPs and advanced APIs and verification Methodologies to accelerate and shift-left their pre-silicon SOC verification and System validation Coverage.
  • Using protocol expertise to drive the requirements and deployment of new protocol products and features in crucial industry standard protocols like PCIe, CXL, Ethernet, USB, AMBA
  • Using emulation and prototyping expertise to drive virtual product performance and supporting customers in getting the most out of their Hardware platform investment and meet their validation goals.

Desired Job Skills
  • Protocol knowledge - PCIE, CXL, Ethernet, USB, AMBA (any preferred)
  • Verification Methodologies (UVM SystemVerilog / Virtual Prototyping SystemC / Portable Stimulus)
  • Software development (C/C++ /Object Oriented programming / Linux Kernel/Driver Development)
  • SOC design and verification experience (preferred)
  • Hardware emulation experience (preferred)
  • HDL language knowledge (SystemVerilog, VHDL)
  • Scripting language knowledge (shell, python, perl)
  • Compiler tools (make, gcc/g++)

Education and experience requirements
  • Bachelors degree in Computer Science or Electrical Engineering with a minimum of 7 years of related experience, or Masters Computer Science or Electrical Engineering degree with a minimum of 5 years of related experience

The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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