Intel brings decades of leadership in networking, virtualization, packet processing, storage, and security to a new class of IPU products that accelerate host networking functions and support ...
Intel brings decades of leadership in networking, virtualization, packet processing, storage, and security to a new class of IPU products that accelerate host networking functions and support ...
Senior Principal ASIC Design Engineer
San Jose, CA · On-site +1
Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic. * Collaborate with verification engineers to create block- and system-level test plans to ...
Senior Principal ASIC Design Engineer
San Jose, CA · On-site +1
Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic. * Collaborate with verification engineers to create block- and system-level test plans to ...
Software Development Engineer
Seattle, WA · On-site
You'll work on network virtualization protocols, packet processing pipelines, and availability mechanisms that must perform correctly at massive scale with sub-second latency requirements. You'll ...
Software Development Engineer
Seattle, WA · On-site
You'll work on network virtualization protocols, packet processing pipelines, and availability mechanisms that must perform correctly at massive scale with sub-second latency requirements. You'll ...
Software Development Engineer
Seattle, WA · On-site
You'll work on network virtualization protocols, packet processing pipelines, and availability mechanisms that must perform correctly at massive scale with sub-second latency requirements. You'll ...
Software Development Engineer
Seattle, WA · On-site
You'll work on network virtualization protocols, packet processing pipelines, and availability mechanisms that must perform correctly at massive scale with sub-second latency requirements. You'll ...
Software Development Engineer
Seattle, WA · On-site
You'll work on network virtualization protocols, packet processing pipelines, and availability mechanisms that must perform correctly at massive scale with sub-second latency requirements. You'll ...
Software Development Engineer
Seattle, WA · On-site
You'll work on network virtualization protocols, packet processing pipelines, and availability mechanisms that must perform correctly at massive scale with sub-second latency requirements. You'll ...
Senior Wireless Software Engineer - MAC Layer - TeraWave
Seattle, WA · On-site
$197K - $276K/yr
Optimize the interface between the wireless MAC layer and high-speed packet processing engines such as DPDK and VPP, ensuring zero-copy data paths and minimal jitter * Design MAC layer architectures ...
Senior Wireless Software Engineer - MAC Layer - TeraWave
Seattle, WA · On-site
$197K - $276K/yr
Optimize the interface between the wireless MAC layer and high-speed packet processing engines such as DPDK and VPP, ensuring zero-copy data paths and minimal jitter * Design MAC layer architectures ...
Analyze network protocols and develop algorithms for efficient packet processing and routing * Conduct code reviews to ensure quality, maintainability, and adherence to best practices * Troubleshoot ...
Analyze network protocols and develop algorithms for efficient packet processing and routing * Conduct code reviews to ensure quality, maintainability, and adherence to best practices * Troubleshoot ...
Some experience with fast-packet processing in user space and common kernel-bypass implementations would be ideal (such as Solarflare OpenOnload/TCPDirect/ef_vi, Exablaze, InfiniBand verbs, DPDK)
Some experience with fast-packet processing in user space and common kernel-bypass implementations would be ideal (such as Solarflare OpenOnload/TCPDirect/ef_vi, Exablaze, InfiniBand verbs, DPDK)
Senior ASIC Design Engineer
San Jose, CA · On-site +1
Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic. * Collaborate with verification engineers to create block- and system-level test plans to ...
Senior ASIC Design Engineer
San Jose, CA · On-site +1
Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic. * Collaborate with verification engineers to create block- and system-level test plans to ...
Intel brings decades of leadership in networking, virtualization, packet processing, storage, and security to a new class of IPU products that accelerate host networking functions and support ...
Intel brings decades of leadership in networking, virtualization, packet processing, storage, and security to a new class of IPU products that accelerate host networking functions and support ...
Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic. * Collaborate with verification engineers to create block- and system-level test plans to ...
Quick apply
Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic. * Collaborate with verification engineers to create block- and system-level test plans to ...
Sr. Software Development Engineer, Amazon Leo for Government
Sunnyvale, CA · On-site
$143K - $189K/yr
S. government-imposed requirements related to the nature of the work and/or where it will be performed. 10037 Key job responsibilities In this role you will: - Utilize network layer packet processing ...
Sr. Software Development Engineer, Amazon Leo for Government
Sunnyvale, CA · On-site
$143K - $189K/yr
S. government-imposed requirements related to the nature of the work and/or where it will be performed. 10037 Key job responsibilities In this role you will: - Utilize network layer packet processing ...
You'll work on network virtualization protocols, packet processing pipelines, and availability mechanisms that must perform correctly at massive scale with sub-second latency requirements. You'll ...
You'll work on network virtualization protocols, packet processing pipelines, and availability mechanisms that must perform correctly at massive scale with sub-second latency requirements. You'll ...
Packet processing pipelines * DMA engines * Traffic management * Buffer management * Queue managers * Flow-control mechanisms * Statistics and monitoring engines * Collaborate with architecture ...
Packet processing pipelines * DMA engines * Traffic management * Buffer management * Queue managers * Flow-control mechanisms * Statistics and monitoring engines * Collaborate with architecture ...
You'll work on network virtualization protocols, packet processing pipelines, and availability mechanisms that must perform correctly at massive scale with sub-second latency requirements. You'll ...
You'll work on network virtualization protocols, packet processing pipelines, and availability mechanisms that must perform correctly at massive scale with sub-second latency requirements. You'll ...
Senior Wireless Software Engineer - MAC Layer - TeraWave
Seattle, WA · On-site
$197K - $276K/yr
Optimize the interface between the wireless MAC layer and high-speed packet processing engines such as DPDK and VPP, ensuring zero-copy data paths and minimal jitter * Design MAC layer architectures ...
Senior Wireless Software Engineer - MAC Layer - TeraWave
Seattle, WA · On-site
$197K - $276K/yr
Optimize the interface between the wireless MAC layer and high-speed packet processing engines such as DPDK and VPP, ensuring zero-copy data paths and minimal jitter * Design MAC layer architectures ...
Packet processing pipelines * DMA engines * Traffic management * Buffer management * Queue managers * Flow-control mechanisms * Statistics and monitoring engines * Collaborate with architecture ...
Packet processing pipelines * DMA engines * Traffic management * Buffer management * Queue managers * Flow-control mechanisms * Statistics and monitoring engines * Collaborate with architecture ...
Senior Wireless Software Engineer - MAC Layer - TeraWave
Bodega Bay, CA · On-site
$197K - $276K/yr
Optimize the interface between the wireless MAC layer and high-speed packet processing engines such as DPDK and VPP, ensuring zero-copy data paths and minimal jitter * Design MAC layer architectures ...
Senior Wireless Software Engineer - MAC Layer - TeraWave
Bodega Bay, CA · On-site
$197K - $276K/yr
Optimize the interface between the wireless MAC layer and high-speed packet processing engines such as DPDK and VPP, ensuring zero-copy data paths and minimal jitter * Design MAC layer architectures ...
Senior Wireless Software Engineer - MAC Layer - TeraWave
Seattle, WA · On-site
$197K - $276K/yr
... speed packet processing engines such as DPDK and VPP, ensuring zero-copy data paths and minimal jitter Design MAC layer architectures for constellation-scale deployments, ensuring efficient ...
Senior Wireless Software Engineer - MAC Layer - TeraWave
Seattle, WA · On-site
$197K - $276K/yr
... speed packet processing engines such as DPDK and VPP, ensuring zero-copy data paths and minimal jitter Design MAC layer architectures for constellation-scale deployments, ensuring efficient ...
Sr. Embedded Network Engineer with Security Clearance
$190K - $220K/yr
... space packet processing or kernel bypass technologies (e.g., VPP or similar) Experience with secure routers, VPN devices, or encryption products Familiarity with Linux networking internals Rust ...
Sr. Embedded Network Engineer with Security Clearance
$190K - $220K/yr
... space packet processing or kernel bypass technologies (e.g., VPP or similar) Experience with secure routers, VPN devices, or encryption products Familiarity with Linux networking internals Rust ...
Packet Processing information
See salary details
$13.46 - $14.82
2% of jobs
$14.82 - $16.17
2% of jobs
$16.17 - $17.53
5% of jobs
$18.54 is the 25th percentile. Wages below this are outliers.
$17.53 - $18.88
21% of jobs
The median wage is $19.74 / hr.
$18.88 - $20.24
31% of jobs
$20.24 - $21.59
6% of jobs
$21.59 - $22.95
3% of jobs
$23.44 is the 75th percentile. Wages above this are outliers.
$22.95 - $24.30
11% of jobs
$24.30 - $25.66
7% of jobs
$25.66 - $27.01
6% of jobs
$27.01 - $28.37
4% of jobs
$13
$21
$28
How much do packet processing jobs pay per hour?
What is the difference between Packet Processing vs Network Technician?
| Aspect | Packet Processing | Network Technician |
|---|---|---|
| Required Credentials | Networking certifications (e.g., Cisco CCNA), knowledge of protocols | Networking certifications, basic troubleshooting skills |
| Work Environment | Data centers, network operations centers, enterprise networks | Office settings, client sites, network infrastructure environments |
| Employer & Industry Usage | Telecommunications, data service providers, large enterprises | IT service providers, corporate IT departments, telecom companies |
Packet Processing involves managing and analyzing data packets within networks, focusing on data flow and protocol handling. Network Technicians perform hands-on troubleshooting, installing, and maintaining network hardware and connections. While both roles require networking knowledge and certifications, Packet Processing is more specialized in data flow management, whereas Network Technicians focus on hardware and connectivity issues.
What is packet processing in networking?
What are the key skills and qualifications needed to thrive as a Packet Processing Engineer, and why are they important?
What are some typical challenges faced by professionals working in packet processing roles?

Full-time
Medical, Retirement, PTO
Posted 6 days ago
Intel rating
8.8
Based on 143 frontline employees who took The Breakroom Quiz
8th of 139 rated electronics manufacturers
Job description
Join an enthusiastic team of engineers in Intel's Networking Solutions Group (NSG) focused on enabling next generation programmable Infrastructure Processing Units (IPUs) with our lead customers as part of the Customer Experience Support (CES) organization. Intel brings decades of leadership in networking, virtualization, packet processing, storage, and security to a new class of IPU products that accelerate host networking functions and support emerging use cases such as security, virtualization, storage, load balancing, and data path optimization.
Working closely with major cloud service providers and Intel development teams, you will help deliver customized IPU based solutions that enhance isolation, security, performance, and system management for our customers.
Projects and Responsibilities:
- Define and develop targeted IPU solutions to meet cloud service providers' requirements and support their deployment into production environments.
- Develop and execute system level use case and workload testing, including debugging and verification of IPU software packages across platforms and OS versions.
- Collaborate closely with engineering teams and customers to enable rapid debugging and issue resolution.
- Create technical collaterals such as release notes, application notes, user guides, and white papers to simplify customer design and adoption of Intel IPU solutions.
- Engage with technologists across Intel and the broader industry, developers, and project managers to evaluate requirement feasibility, set development priorities, communicate solutions, and identify customer gaps that influence engineering direction
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications:
- Bachelor's degree with 4+ years of industry experience, or master's degree with 2+ years of industry experience in Computer Science or Computer Engineering.
2+ Years of experience with the following technical skills:
- Proven knowledge and experience with object-oriented programming and Python, including strong analytical, debugging, and problem-solving skills.
- Experience with build and development tools and systems such as git, GitHub, RPM, makefiles, shell scripting, Docker, and Jenkins.
- Working knowledge of at least one major Linux distribution (e.g., Ubuntu or Red Hat), including networking stacks and drivers.
Preferred Qualifications:
- Strong communication and influencing skills with a customer-focused attitude and mindset.
- Motivation to take on new product enablement challenges, with demonstrated experience supporting customers directly.
- Experience with system level server or network debugging across hardware, software, and firmware.
- Comprehensive knowledge of Ethernet products and ecosystems for enterprise and datacenter environments.
- Broad system level experience with P4 and/or DPDK software development environments.
- Experience implementing datacenter storage, packet processing, and/or RDMA technologies.
- System admin or network admin-level experience with largescale datacenter workloads (e.g., databases, load balancers, web servers, switch configuration) is a plus.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $111,030.00-211,200.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.About Intel
Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Industry
Manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1968