1

Packaging Design Internship Jobs in Oregon (NOW HIRING)

Analog Engineer

Hillsboro, OR · On-site

$220K/yr

... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ... packaging technology leadership for the AI era, enabling our customers to design leadership ...

Analog Engineer

Hillsboro, OR · On-site

$220K/yr

... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ... packaging technology leadership for the AI era, enabling our customers to design leadership ...

Design and implement modifications to operating equipment to improve efficiency and production ... Benefits We offer a total compensation package that ranks among the best in the industry. It ...

Design and implement modifications to operating equipment to improve efficiency and production ... Benefits We offer a total compensation package that ranks among the best in the industry. It ...

Design and implement modifications to operating equipment to improve efficiency and production ... Benefits We offer a total compensation package that ranks among the best in the industry. It ...

Design and implement modifications to operating equipment to improve efficiency and production ... Benefits We offer a total compensation package that ranks among the best in the industry. It ...

Work with R&D and Engineering team on new product definition, risk assessment, package design ... Interns are eligible for some of the benefits listed. Our pay ranges are determined by role, level ...

Support the delivery of design packages that are accurate, complete, and executed within ... Previous experience or internship exposure within advanced technology, semiconductor, manufacturing ...

Mentor and develop Interns and new incoming project management staff. Requirements * Bachelor ... No other builder can offer the collaborative design-build approach that Clayco does. * We work on ...

Showing results 21-40

Packaging Design Internship information

See Oregon salary details

$9

$20

$38

How much do packaging design internship jobs pay per hour?

As of Aug 10, 2026, the average hourly pay for packaging design internship in Oregon is $20.49, according to ZipRecruiter salary data. Most workers in this role earn between $15.24 and $22.88 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in a packaging design internship, and why are they important?

A strong foundation in graphic design, creativity, and attention to detail—often supported by coursework in design or related fields—is essential for a Packaging Design Internship. Familiarity with design software such as Adobe Creative Suite (Illustrator, Photoshop, InDesign) and an understanding of print production processes are typically required. Excellent communication, teamwork skills, and the ability to receive and implement feedback help interns collaborate effectively within multidisciplinary teams. These qualifications ensure interns can create appealing packaging concepts that meet branding requirements and practical constraints.

What does a packaging design internship do?

A packaging design internship involves assisting with the creation and development of packaging concepts, layouts, and prototypes. Interns typically use design software like Adobe Illustrator or Photoshop and collaborate with teams to ensure packaging meets branding and functional requirements. The role provides hands-on experience in graphic design, product presentation, and industry standards for packaging.

What is a packaging design internship?

A Packaging Design Internship is a temporary role where interns assist in creating and developing packaging designs for products. Interns typically work with design teams to conceptualize, prototype, and refine packaging that aligns with branding and functional requirements. They may use design software like Adobe Illustrator or Photoshop and collaborate with marketing and production teams. This internship helps build practical experience in graphic design, material selection, and sustainability considerations in packaging.

What kinds of projects and responsibilities can I expect as a packaging design intern?

As a Packaging Design Intern, you will typically support senior designers in creating and refining packaging concepts, developing dielines, choosing materials, and preparing files for print production. You may participate in brainstorming sessions, conduct research on packaging trends and sustainability, and assist with mockups and prototype testing. Interns often have opportunities to present their ideas to cross-functional teams and receive feedback from design, marketing, and production departments. This hands-on involvement helps you understand the end-to-end packaging development process and build a strong professional portfolio.

What are popular job titles related to Packaging Design Internship jobs in Oregon? For Packaging Design Internship jobs in Oregon, the most frequently searched job titles are:
What cities in Oregon are hiring for Packaging Design Internship jobs? Cities in Oregon with the most Packaging Design Internship job openings:

Analog Engineer

Intel Corporation

Hillsboro, OR • On-site

$220K/yr

Full-time

Medical, Retirement, PTO

Re-posted 23 days ago


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 156 rated electronics manufacturers


Job description

Job Details:
Job Description:
The Role and Impact
Join Intel's Advanced Design Foundational IP Organization (AD-FIP) within the Design Technology Platform (DTP), a team that is pivotal in shaping the future of analog and mixed-signal IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and developing cutting-edge analog circuits in advanced process nodes. Your work will directly impact Intel's ability to deliver the best-in-class foundational IP and product designs that drive innovation across client, server, and networking technologies. Collaborating with cross-functional teams, you will play a critical role in optimizing performance, power, area, and yield of circuits while pushing the boundaries of what is possible in semiconductor technology.
Key Responsibilities
  • Design, develop, and implement analog circuits and mixed-signal IPs, including ADCs, DACs, voltage regulators, and high-speed I/O interfaces.
  • Perform circuit-level design, simulation, and optimization to meet power, performance, area, timing, and yield requirements.
  • Create and validate floorplans, extract chip parameters, and simulate analog behavior models to ensure robust designs.
  • Develop test plans for design verification and evaluate test results to meet specification requirements.
  • Collaborate with architecture and layout teams to design circuits that maximize functionality, robustness, and electrical capabilities.
  • Conduct tape-out activities for analog and mixed-signal circuits, ensuring successful silicon implementation.
  • Analyze and resolve performance and circuit-related issues during design and post-silicon validation phases.
  • Serve as a technical interface to process technology, IP engineers, and product teams, leveraging design insights to influence future process node development.

Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field and 8+ years of experience in analog and mixed-signal circuit design; or Master's degree with 6+ years of experience; or PhD with 4+ years of experience.

3+ years of experience with the following technical skills
  • Expertise in analog circuit design, simulation, and verification.
  • Proficiency in CMOS technologies and layout understanding for analog circuits.
  • Experience with tape-out processes for analog mixed-signal circuits, including ADCs and DACs.
  • Knowledge of SoC analog layout design checks and methodologies.

Preferred Qualifications
  • Advanced knowledge of high-speed parallel or serial I/O links, clock distribution, or voltage regulator design.
  • Experience with PLLs, bandgap references, inductors, transmission lines, and RF or millimeter-wave circuits.
  • Strong understanding of power delivery networks (PDN) and integrated power regulators.
  • Proven ability to collaborate across teams and influence decisions related to process technology and product development.

Come be a part of Intel's mission to shape the future of technology. Apply today to join a team where innovation, collaboration, and excellence drive the creation of transformative products.
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
US, Arizona, Phoenix, US, California, Santa Clara, US, Texas, Austin
Business group:
Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

What Intel employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom


Intel logo

About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968