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Packaging Design Engineer Jobs in Gilbert, AZ (NOW HIRING)

Intel

Silicon Packaging Design Engineer

Phoenix, AZ · On-site

$105.65K - $149.15K/yr

As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of advanced substrate designs, contributing to the creation of cutting-edge technology that fuels Intel ...

Intel

Silicon Packaging Design Engineer

Phoenix, AZ

$135K/yr

Intel seeks a motivated and innovative Silicon Packaging Design Engineer to join our team, driving the end-to-end development of silicon interposer and bridge designs that define the future of ...

Marvell

Advanced Packaging Design

Chandler, AZ

$133.90K/yr

What You Can Expect As an Advanced Packaging Design engineer, responsibilities include understanding of substrate or PCB design tools such as APD or Xpedition to generate advanced packaging solutions ...

Marvell

Package Design Engineer

Chandler, AZ

$133.90K/yr

Your Team, Your Impact Advanced Packaging Physical Design for Photonic Fabric BU What You Can Expect * Package Design: * Lead Si/package/PCB/system co-design work collaborating with downstream system ...

Intel

Package Design Rule Owner (DRO)

Phoenix, AZ

$141.91K - $269.10K/yr

Bachelor's degree in Electrical Engineering, Chemical Engineering, Mechanical Engineering, Physics ... Expertise in advanced packaging architectures such as EMIB and Foveros. * 5+ years of strong ...

Amkor Technology

Engineer, Design

Tempe, AZ · On-site

S. headquartered OSAT and is a global leader in outsourced semiconductor packaging and test ... Amkor Technology is currently hiring an IC package Design Engineer for its Tempe, AZ location. This ...

ISAT Total Support

Design Engineer

Phoenix, AZ · On-site

You will be responsible for preparing custom engineering packages, providing technical support ... This role blends engineering design, project coordination, technical communication, and product ...

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$134.8K

How much do packaging design engineer jobs pay per year?

As of May 28, 2026, the average yearly pay for packaging design engineer in Gilbert, AZ is $133,394.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,300.00 and $134,300.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Packaging Design Engineer, and why are they important?

To thrive as a Packaging Design Engineer, you need a background in engineering or industrial design, strong CAD skills, and a solid understanding of materials science. Familiarity with tools like AutoCAD, SolidWorks, and packaging testing systems, as well as knowledge of industry standards, is typically required. Creativity, problem-solving, and effective collaboration are standout soft skills in this role. These abilities ensure that packaging solutions are innovative, cost-effective, and meet safety and sustainability requirements.

What are some common challenges faced by Packaging Design Engineers when developing new packaging solutions?

Packaging Design Engineers often encounter challenges balancing functionality, cost, and sustainability in their designs. They must ensure that packaging protects the product during transit and storage while also considering material efficiency and environmental impact. Additionally, collaborating with cross-functional teams such as marketing, manufacturing, and logistics is crucial to align design with brand requirements and production capabilities. Tight deadlines and changing client specifications can further add to the complexity of the role.

What does a Packaging Design Engineer do?

A Packaging Design Engineer is responsible for creating and developing packaging solutions that protect products during transportation, storage, and display. Their role involves designing packaging that is both functional and cost-effective, while also considering aspects like sustainability, manufacturability, and brand image. They collaborate with product development, marketing, and manufacturing teams to ensure packaging meets technical requirements and regulatory standards. Additionally, they may conduct testing to evaluate the performance of packaging materials and designs.

What is the difference between Packaging Design Engineer vs Packaging Technician?

AspectPackaging Design EngineerPackaging Technician
CredentialsBachelor's degree in packaging engineering, industrial design, or related fieldHigh school diploma or associate degree, technical training
Work EnvironmentDesign studios, R&D labs, manufacturing settingsProduction lines, warehouse, testing facilities
Job FocusDeveloping and optimizing packaging designs, materials, and prototypesImplementing packaging processes, testing, and quality control
Industry UsageUsed by companies creating new packaging solutionsUsed in packaging assembly and quality assurance

The Packaging Design Engineer primarily focuses on creating and improving packaging designs, requiring specialized education and working in design environments. In contrast, the Packaging Technician handles the implementation, testing, and quality control of packaging in production settings. Both roles are essential in the packaging industry but differ in responsibilities and skill requirements.

What are popular job titles related to Packaging Design Engineer jobs in Gilbert, AZ? For Packaging Design Engineer jobs in Gilbert, AZ, the most frequently searched job titles are:
What cities near Gilbert, AZ are hiring for Packaging Design Engineer jobs? Cities near Gilbert, AZ with the most Packaging Design Engineer job openings:
Packaging Design Engineer jobs near you
Silicon Packaging Design Engineer

Silicon Packaging Design Engineer

Intel Corporation

Phoenix, AZ • On-site

$105.65K - $149.15K/yr

Full-time

Medical, Retirement, PTO

Posted yesterday

Intel rating

8.8

Company rating: 8.8 out of 10

Based on 143 frontline employees who took The Breakroom Quiz

9th of 137 rated electronics manufacturers

Job description

Job Details:
Job Description:
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of advanced substrate designs, contributing to the creation of cutting-edge technology that fuels Intel's innovation. You will be responsible for the end-to-end development of substrate designs, from concept through tape-out, ensuring optimal performance, cost efficiency, and manufacturability. This position provides an exciting opportunity to work collaboratively with silicon and hardware teams, directly impacting Intel's success in delivering world-class solutions for high-performance applications.
Key Responsibilities
  • Drive the physical layout and routing of package designs, ensuring alignment with silicon, package, and board performance requirements.
  • Perform substrate fit and routing studies to establish design, performance, and cost tradeoffs.
  • Define and implement substrate design rules, conducting internal and external reviews to ensure designs meet quality standards.
  • Analyze data, resolve Design Rule Checks (DRCs), and optimize package designs for manufacturability and performance.
  • Collaborate with cross-functional teams to optimize pinout and silicon-package-board interactions.
  • Complete documentation and collateral into the product lifecycle management system of record.

Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications
  • Bachelors with 1+ years of experience or master's degree with 6 months of experience in Electrical Engineering, Mechanical Engineering, or Material Sciences disciplines.

6+ months of experience with the following technical skills:
  • Experience and/or familiarity with microelectronic package or PCB physical layout design and manufacturing process.
  • Familiarity with package design tools like Siemens Xpedition, Cadence Allegro Package Design, AutoCAD, or SolidWorks.
  • Familiarity with physical layout aspects of substrate design, including custom layouts, floor plans, or schematic layout conversion.

Preferred Qualifications:
  • Experience in microelectronic package substrate design, package I/O routing, and/or technology development.
  • Familiarity with microelectronic package electrical modeling and simulation tools such as PowerDC, HyperLynx, Q3D, and HFSS.
  • Strong analytical ability and problem-solving skills, including debugging and providing creative solutions.
  • Experience with package design tools such as Package Layout Automation (PLA) and FIELD.
  • Experience with scripting using Python, VB, C, or similar languages.

Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Arizona, Phoenix
Additional Locations:
Business group:
Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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