Austin, TX · On-site
$134K - $164K/yr
Has used modern verification methodologies such UVM/VMM/OVM. UVM is preferred. Experience verifying and debugging RTL , preferably in context of CPU, GPU, video, display or signal processing system.
Austin, TX · On-site
$134K - $164K/yr
Has used modern verification methodologies such UVM/VMM/OVM. UVM is preferred. Experience verifying and debugging RTL , preferably in context of CPU, GPU, video, display or signal processing system.
San Jose, CA · On-site
Strong in HVL (UVM / SystemVerilog / OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows. * Strong in constraint random verification, assertion writing, coverage ...
San Jose, CA · On-site
Strong in HVL (UVM / SystemVerilog / OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows. * Strong in constraint random verification, assertion writing, coverage ...
Dallas, TX · On-site
$127K/yr
Qualifications:** - 7+ years of experience in pre-silicon design verification. - Proficiency in C-shell scripting, Verilog-HDL, and System Verilog. - Strong knowledge in SV Assertions, UVM/OVM, and ...
Dallas, TX · On-site
$127K/yr
Qualifications:** - 7+ years of experience in pre-silicon design verification. - Proficiency in C-shell scripting, Verilog-HDL, and System Verilog. - Strong knowledge in SV Assertions, UVM/OVM, and ...
Dedham, MA · On-site
$127K - $175K/yr
Medical
Retirement
Experience with OVM / UVM design verification methodology: bash/csh, Perl, TCL, Python or similar scripting languages; VHDL or similar hardware description languages. What sets you apart:
Dedham, MA · On-site
$127K - $175K/yr
Medical
Retirement
Experience with OVM / UVM design verification methodology: bash/csh, Perl, TCL, Python or similar scripting languages; VHDL or similar hardware description languages. What sets you apart:
San Jose, CA · On-site
$117K - $160K/yr
Strong in HVL (UVM / SystemVerilog / OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows. * Strong in constraint random verification, assertion writing, coverage ...
San Jose, CA · On-site
$117K - $160K/yr
Strong in HVL (UVM / SystemVerilog / OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows. * Strong in constraint random verification, assertion writing, coverage ...
San Diego, CA · On-site
Experience with methodologies like RVM/VMM/OVM/UVM. RTL design experience and/or very strong OOPs programming experience is also a plus. * Experience with simulation acceleration tool like Veloce ...
San Diego, CA · On-site
Experience with methodologies like RVM/VMM/OVM/UVM. RTL design experience and/or very strong OOPs programming experience is also a plus. * Experience with simulation acceleration tool like Veloce ...
Strong knowledge in SV Assertions, UVM/OVM and functional code coverage. * SOC Verification experience using ARM Cortex Microcontroller is required. * Experience with advanced peripheral bus ...
Quick apply
Strong knowledge in SV Assertions, UVM/OVM and functional code coverage. * SOC Verification experience using ARM Cortex Microcontroller is required. * Experience with advanced peripheral bus ...
San Diego, CA · Remote
$139K - $169K/yr
Work on HVL (UVM / SystemVerilog / OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows. * Perform constraint random verification, assertion writing, coverage ...
Quick apply
San Diego, CA · Remote
$139K - $169K/yr
Work on HVL (UVM / SystemVerilog / OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows. * Perform constraint random verification, assertion writing, coverage ...
San Jose, CA · On-site
$159K - $194K/yr
SystemVerilog/OVM/UVM is required and OO programming experience is a plus Knowledge of assertion based (SVA, PSL based) methodologies - formal and simulation - is necessary Experience in establishing ...
San Jose, CA · On-site
$159K - $194K/yr
SystemVerilog/OVM/UVM is required and OO programming experience is a plus Knowledge of assertion based (SVA, PSL based) methodologies - formal and simulation - is necessary Experience in establishing ...
... OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows. · Strong in constraint random verification, assertion writing, coverage analysis, debugging. · Familiarity ...
... OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows. · Strong in constraint random verification, assertion writing, coverage analysis, debugging. · Familiarity ...
San Jose, CA · On-site
$159K - $194K/yr
Proficient in System Verilog/UVM/OVM, and OOP/C++ * Deep understanding of constrained randomization and the development of efficient test suites * Experience with code coverage and functional ...
San Jose, CA · On-site
$159K - $194K/yr
Proficient in System Verilog/UVM/OVM, and OOP/C++ * Deep understanding of constrained randomization and the development of efficient test suites * Experience with code coverage and functional ...
$141K - $200K/yr
Medical
Retirement
PTO
... OVM/UVM methodologies, debugging, and test planning OR * Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in ...
$141K - $200K/yr
Medical
Retirement
PTO
... OVM/UVM methodologies, debugging, and test planning OR * Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in ...
$141K - $200K/yr
Medical
Retirement
PTO
... OVM/UVM methodologies, debugging, and test planning OR * Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in ...
$141K - $200K/yr
Medical
Retirement
PTO
... OVM/UVM methodologies, debugging, and test planning OR * Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in ...
Austin, TX · On-site
$141K - $200K/yr
Medical
Retirement
PTO
... OVM/UVM methodologies, debugging, and test planning OR * Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in ...
Austin, TX · On-site
$141K - $200K/yr
Medical
Retirement
PTO
... OVM/UVM methodologies, debugging, and test planning OR * Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in ...
San Francisco, CA · On-site
$180K - $210K/yr
Knowledgeable of common DV techniques such as assertions, SV, OVM/UVM, constrained random, and coverage (code/functional/assertion). * Strong knowledge of Verilog or VHDL, C. * Capable of scripting ...
Quick apply
San Francisco, CA · On-site
$180K - $210K/yr
Knowledgeable of common DV techniques such as assertions, SV, OVM/UVM, constrained random, and coverage (code/functional/assertion). * Strong knowledge of Verilog or VHDL, C. * Capable of scripting ...
San Jose, CA · On-site
... OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows. · Strong in constraint random verification, assertion writing, coverage analysis, debugging. · Familiarity ...
San Jose, CA · On-site
... OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows. · Strong in constraint random verification, assertion writing, coverage analysis, debugging. · Familiarity ...
Cincinnati, OH · On-site
$124K - $160K/yr
Knowledge using System Verilog for verification with AVM, VMM, OVM, or UVM a plus. Developing C# source code targeting enhanced Flash Microcontrollers.
Quick apply
Cincinnati, OH · On-site
$124K - $160K/yr
Knowledge using System Verilog for verification with AVM, VMM, OVM, or UVM a plus. Developing C# source code targeting enhanced Flash Microcontrollers.
$141K - $200K/yr
Medical
Retirement
PTO
... OVM/UVM methodologies, debugging, and test planning OR * Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in ...
$141K - $200K/yr
Medical
Retirement
PTO
... OVM/UVM methodologies, debugging, and test planning OR * Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in ...
Fort Wayne, IN · On-site
$90 - $120/hr
Verification environment architecture and design using SystemVerilog with OVM/UVM * Creation of written test plan, test cases, code coverage tracking, and functional coverage tracking * Testbench ...
Fort Wayne, IN · On-site
$90 - $120/hr
Verification environment architecture and design using SystemVerilog with OVM/UVM * Creation of written test plan, test cases, code coverage tracking, and functional coverage tracking * Testbench ...
Littleton, CO · On-site
$100/hr
ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM. * 3+ years professional experience. * Active DoD Secret clearance POSITION RESPONSIBILITIES * Support ...
Littleton, CO · On-site
$100/hr
ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM. * 3+ years professional experience. * Active DoD Secret clearance POSITION RESPONSIBILITIES * Support ...
$75.5K - $84.3K
2% of jobs
$84.3K - $93.1K
7% of jobs
$93.1K - $102K
14% of jobs
$103.3K is the 25th percentile. Wages below this are outliers.
$102K - $110.8K
14% of jobs
The median wage is $119K / yr.
$110.8K - $119.6K
15% of jobs
$119.6K - $128.4K
14% of jobs
$135.8K is the 75th percentile. Wages above this are outliers.
$128.4K - $137.2K
13% of jobs
$137.2K - $146K
8% of jobs
$146K - $154.9K
7% of jobs
$154.9K - $163.7K
5% of jobs
$163.7K - $172.5K
2% of jobs
$75.5K
$124.4K
$172.5K
One of the main challenges an OVM faces is ensuring timely and accurate order fulfillment while maintaining strong relationships with multiple vendors. This often involves juggling shifting priorities, managing inventory discrepancies, and quickly resolving supply chain disruptions. Effective OVM specialists use clear communication, proactive problem-solving, and up-to-date management software to overcome these hurdles. Team collaboration with procurement, logistics, and finance departments is key to successfully navigating these challenges. This creates a dynamic and fast-paced work environment, ideal for those who enjoy multitasking and continuous process improvement.
To thrive as an OVM (Order and Vendor Management) specialist, you need strong organizational skills, experience in supply chain management, and often a degree in business administration or a related field. Familiarity with procurement software, enterprise resource planning (ERP) systems, and possibly certification in supply chain or purchasing is valuable. Exceptional attention to detail, communication, and negotiation skills help professionals succeed in coordinating with vendors and internal teams. These skills ensure efficient order processing, reliable vendor relationships, and the smooth functioning of business operations.
An OVM (Operations and Vendor Manager) job typically involves overseeing vendor relationships, ensuring contract compliance, and optimizing operational efficiency. This role requires strong communication, problem-solving, and negotiation skills to manage third-party vendors and service providers effectively. OVMs often work in industries like IT, supply chain management, or customer service, ensuring seamless collaboration between internal teams and external partners. Responsibilities may include performance tracking, risk management, and cost control to achieve business goals.
States with the most job openings for Ovm jobs include:
The top searched job categories for Ovm jobs are:
$134K - $164K/yr
Contractor
Re-posted 29 days ago
Job Title, Lab:
Contractor Verification Engineer, APL
General Description Vision:
Perform pre-silicon validation of GPU unit(s).
Responsibilities Include:
Learn the architecture and micro architecture by studying specifications and direct interaction with architects and logic designers.
Review unit level test plans; modify if necessary.
Write the tests outlined by test plan. Enhance testbench if necessary, e.g. add coverage assertions.
Debug test failures, fix test or testbench if necessary. Report RTL failures to RTL designers. Confirm bug is fixed.
Enhance test benches and tests to achieve coverage goals.
Support debug of unit in upper levels of design hierarchy.
Experience Requirements:
Has used modern verification methodologies such UVM/VMM/OVM. UVM is preferred.
Experience verifying and debugging RTL , preferably in context of CPU, GPU, video, display or signal processing system.
Understanding of micro-architecture and logic design fundamentals, e.g. finite state machines, arithmetic data path pipelines.
Composed functional coverage assertions, preferably using system Verilog.
The qualified candidate will possess the following:
BSEE or higher degree.
At least 2 years of industry experience in a design verification role.
Proficient in System Verilog. C++, Python/Perl skills are also desirable.
Good verbal and written communication skills.
All your information will be kept confidential according to EEO guidelines.
Sourced by ZipRecruiter
Manufacturing
51 - 200 Employees
Milpitas, CA, US
2005
