Supports SoC customers to ensure high quality integration of the IP block. Key Responsibilities * Develop logic design, RTL coding, and simulation for mixed-signal IPs including cell libraries ...
Supports SoC customers to ensure high quality integration of the IP block. Key Responsibilities * Develop logic design, RTL coding, and simulation for mixed-signal IPs including cell libraries ...
Supports SoC customers to ensure high quality integration of the IP block. Key Responsibilities * Develop logic design, RTL coding, and simulation for mixed-signal IPs including cell libraries ...
Supports SoC customers to ensure high quality integration of the IP block. Key Responsibilities * Develop logic design, RTL coding, and simulation for mixed-signal IPs including cell libraries ...
Supports SoC customers to ensure high quality integration of the IP block. Key Responsibilities * Develop logic design, RTL coding, and simulation for mixed-signal IPs including cell libraries ...
Supports SoC customers to ensure high quality integration of the IP block. Key Responsibilities * Develop logic design, RTL coding, and simulation for mixed-signal IPs including cell libraries ...
High Speed Analog/RF/Mixed-Signal Design Engineer
Austin, TX · On-site
$140 - $190/hr
High Speed Analog/RF/Mixed-Signal Design Engineer We are seeking talented High Speed Analog/RF ... You will closely work with SOC teams to deliver IP views and make sure they meet the quality ...
High Speed Analog/RF/Mixed-Signal Design Engineer
Austin, TX · On-site
$140 - $190/hr
High Speed Analog/RF/Mixed-Signal Design Engineer We are seeking talented High Speed Analog/RF ... You will closely work with SOC teams to deliver IP views and make sure they meet the quality ...
Engage with cross-functional analog, digital, DV, firmware, software, SoC architecture, technology ... and mixed-signal circuits and sub-systems for sensing and measurement. Such experience within ...
Engage with cross-functional analog, digital, DV, firmware, software, SoC architecture, technology ... and mixed-signal circuits and sub-systems for sensing and measurement. Such experience within ...
Experience working with Digital, Mixed Signal, SOC Devices and a solid understanding of ATE production testing. Hands on ATE and/or Bench experience is a plus. Statistical data analysis tools to ...
Experience working with Digital, Mixed Signal, SOC Devices and a solid understanding of ATE production testing. Hands on ATE and/or Bench experience is a plus. Statistical data analysis tools to ...
Mixed-Signal Verification Engineer
San Francisco, CA · On-site
$160K - $195K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
Mixed-Signal Verification Engineer
San Francisco, CA · On-site
$160K - $195K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
Mixed-Signal Verification Engineer
San Francisco, CA · On-site
$160K - $195K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
Mixed-Signal Verification Engineer
San Francisco, CA · On-site
$160K - $195K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
Mixed-Signal Verification Engineer
$122K - $214K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
Mixed-Signal Verification Engineer
$122K - $214K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
Mixed-Signal Verification Engineer
$175K - $308K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
Mixed-Signal Verification Engineer
$175K - $308K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
Mixed-Signal Verification Engineer
$175K - $308K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
Mixed-Signal Verification Engineer
$175K - $308K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
Mixed-Signal Verification Engineer
$122K - $214K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
Mixed-Signal Verification Engineer
$122K - $214K/yr
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a ... As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ...
$18 - $23.50/hr
As a member of the Mixed Signal team,the candidate will work with senior circuit designers in the design, validation and characterization of mixed signal and analog IP blocks for SOC. The IPs include ...
$18 - $23.50/hr
As a member of the Mixed Signal team,the candidate will work with senior circuit designers in the design, validation and characterization of mixed signal and analog IP blocks for SOC. The IPs include ...
Sr Analog /Mixed Signal Design Manager
$143K - $286K/yr
This position is for an experienced and passionate analog and mixed-signal engineer/manager ... Hands on experience with SOC debug, validation, characterization, test techniques and equipment
Sr Analog /Mixed Signal Design Manager
$143K - $286K/yr
This position is for an experienced and passionate analog and mixed-signal engineer/manager ... Hands on experience with SOC debug, validation, characterization, test techniques and equipment
Mixed-Signal Verification Engineer - Analog IP
Allen, TX · On-site
$126K/yr
Supporting voltages from 1-90V and operating temperatures up to 175°C, Treo enables scalable SoC ... About the Role We are seeking a Mixed-Signal Verification Engineer III to verify analog and mixed ...
Mixed-Signal Verification Engineer - Analog IP
Allen, TX · On-site
$126K/yr
Supporting voltages from 1-90V and operating temperatures up to 175°C, Treo enables scalable SoC ... About the Role We are seeking a Mixed-Signal Verification Engineer III to verify analog and mixed ...
High Speed IO Analog Mixed Signal Design Engineer
San Jose, CA · On-site
$140 - $220/hr
THE ROLE: Be part of AMD's analog/mixed signal IP design team responsible for the design and ... Work and collaborate with System/Platform & SOC architects to translate system level specs to AMS ...
High Speed IO Analog Mixed Signal Design Engineer
San Jose, CA · On-site
$140 - $220/hr
THE ROLE: Be part of AMD's analog/mixed signal IP design team responsible for the design and ... Work and collaborate with System/Platform & SOC architects to translate system level specs to AMS ...
SoC Hard IP Characterization Product Engineer
Austin, TX · On-site
$90 - $120/hr
Experience working with Digital, Mixed Signal, SOC Devices and a solid understanding of ATE production testing. Hands on ATE and/or Bench experience is a plus. * Statistical data analysis tools to ...
SoC Hard IP Characterization Product Engineer
Austin, TX · On-site
$90 - $120/hr
Experience working with Digital, Mixed Signal, SOC Devices and a solid understanding of ATE production testing. Hands on ATE and/or Bench experience is a plus. * Statistical data analysis tools to ...
* Validate ML-Coprocessor, display SOC, Mixed Signal SOC, and IP. * Define validation strategy and test plans for new IP blocks, aligning with RTL, architecture, FW. * Develop silicon validation ...
Quick apply
* Validate ML-Coprocessor, display SOC, Mixed Signal SOC, and IP. * Define validation strategy and test plans for new IP blocks, aligning with RTL, architecture, FW. * Develop silicon validation ...
Mixed Signal Logic Design Engineer
Santa Clara, CA · On-site
$122K - $232K/yr
Supports SoC customers to ensure high quality integration of the IP block. Qualifications: You must ... Expertise in mixed signal fundamentals, low-power design using UPF, and clock gating. * Deep ...
Mixed Signal Logic Design Engineer
Santa Clara, CA · On-site
$122K - $232K/yr
Supports SoC customers to ensure high quality integration of the IP block. Qualifications: You must ... Expertise in mixed signal fundamentals, low-power design using UPF, and clock gating. * Deep ...
High Speed IO Analog Mixed Signal Architect/ Design Engineer
San Jose, CA · On-site
$180 - $240/hr
THE ROLE Be part of AMD's analog/mixed signal IP design team responsible for the design and ... Work and collaborate with System/Platform & SOC architects to translate system level specs to AMS ...
High Speed IO Analog Mixed Signal Architect/ Design Engineer
San Jose, CA · On-site
$180 - $240/hr
THE ROLE Be part of AMD's analog/mixed signal IP design team responsible for the design and ... Work and collaborate with System/Platform & SOC architects to translate system level specs to AMS ...
Mixed Signal Soc information
See salary details
$25K - $34.8K
5% of jobs
$34.8K - $44.6K
0% of jobs
$44.6K - $54.5K
18% of jobs
$55.5K is the 25th percentile. Wages below this are outliers.
$54.5K - $64.3K
23% of jobs
The median wage is $68K / yr.
$64.3K - $74.1K
12% of jobs
$83.8K is the 75th percentile. Wages above this are outliers.
$74.1K - $83.9K
18% of jobs
$83.9K - $93.7K
6% of jobs
$93.7K - $103.5K
7% of jobs
$103.5K - $113.4K
8% of jobs
$113.4K - $123.2K
3% of jobs
$123.2K - $133K
0% of jobs
$25K
$73.8K
$133K
How much do mixed signal soc jobs pay per year?
What is the difference between Mixed Signal Soc vs Digital Signal Processor?
| Aspect | Mixed Signal Soc | Digital Signal Processor |
|---|---|---|
| Primary Function | Integrates analog and digital components for complex systems | Specializes in digital signal processing algorithms |
| Work Environment | Design and integration of hardware and firmware in embedded systems | Focus on software development for digital signal processing tasks |
| Required Skills | VHDL/Verilog, analog/digital circuit design, embedded systems | DSP algorithms, C/C++, real-time processing |
| Industry Usage | Consumer electronics, automotive, IoT devices | Audio, telecommunications, image processing |
While both roles involve working with signal processing, a Mixed Signal Soc engineer designs integrated hardware that combines analog and digital components, whereas a Digital Signal Processor focuses on developing software algorithms for digital data processing. The roles often overlap in embedded systems, but their core responsibilities and skill sets differ significantly.
What do mixed signal system-on-chip engineers do?
What cities are hiring for Mixed Signal Soc jobs?
Cities with the most Mixed Signal Soc job openings:
What states have the most Mixed Signal Soc jobs?
States with the most job openings for Mixed Signal Soc jobs include:
What job categories do people searching Mixed Signal Soc jobs look for?
The top searched job categories for Mixed Signal Soc jobs are:

Full-time
Medical, Retirement, PTO
Re-posted 9 days ago
Intel rating
8.7
Based on 147 frontline employees who took The Breakroom Quiz
19th of 159 rated electronics manufacturers
Job description
Position Overview
Develops the logic design, register transfer level (RTL) coding, and simulation for mixed-signal IPs required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed.
Applies various strategies, tools, and methods for mixed-signal designs including analog behavior modeling and circuit simulation to write RTL and optimize mixed-signal logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
Reviews the verification plan and implementation to ensure design features are verified correctly, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure high quality integration of the IP block.
Key Responsibilities
- Develop logic design, RTL coding, and simulation for mixed-signal IPs including cell libraries, functional units, IP blocks, and subsystems
- Participate in the definition of architecture and microarchitecture features of the block being designed
- Apply strategies, tools, and methods for mixed-signal designs including analog behavior modeling and circuit simulation
- Write and optimize mixed-signal logic to meet power, performance, area, and timing goals
- Ensure design integrity for physical implementation
- Review verification plans and implementation to confirm design features are verified correctly
- Resolve and implement corrective measures for failing RTL tests to ensure feature correctness
- Support SoC customers to ensure high-quality integration of the IP block
What We're Looking For
To be successful in this role, you should demonstrate the following professional traits:
- Cross-functional collaboration- ability to work effectively with analog, digital, and physical design teams throughout the design cycle
- Ownership mentality- capable of independently designing and owning mixed-signal subsystems and IP blocks end-to-end
- Strong debugging instincts- skilled at identifying and resolving issues across both analog and digital domains with precision and efficiency
Minimum Qualifications
You must possess one of the following education and experience combinations to be initially considered for this position:
- Bachelor's Degree in Electrical Engineering, Computer Science, Electronics and Communications Engineering, or related field with7+ yearsof industry experience, OR
- Master's Degree in Electrical Engineering, Computer Science, Electronics and Communications Engineering, or related field with4+ yearsof industry experience
In addition, all candidates must have:
- Expert-level proficiency in Verilog / SystemVerilog (RTL design)
- Digital logic fundamentals
- Experience integrating analog IP with digital logic
- Deep knowledge of RTL-to-GDSII flow, STA, and CDC
- Familiarity with EDA tools
- Understanding of timing, power, and performance trade-offs
Preferred Qualifications
- Knowledge of Power Delivery and Power Management systems
- Solid understanding of analog/mixed-signal blocks such as ADCs, DACs, PLLs, and regulators
- DFT as it relates to mixed-signal HIP
- Scripting language experience, including Perl, TCL/Tk, or Python
- Experience with mixed-signal simulation
- Strong debugging skills across analog and digital domains
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.About Intel
Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Industry
Manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1968