Application Test Engineer
San Jose, CA · On-site
The Application Test Engineer will be responsible for technical support, primarily handling ... Partner effectively with key customers on memory validation and technical troubleshooting to ...
Application Test Engineer
San Jose, CA · On-site
The Application Test Engineer will be responsible for technical support, primarily handling ... Partner effectively with key customers on memory validation and technical troubleshooting to ...
As our DRAM Design Validation Engineer, you will be ensuring the successful integration of DRAM ... Description Work with our design, verification and integration engineers to ensure memory ...
As our DRAM Design Validation Engineer, you will be ensuring the successful integration of DRAM ... Description Work with our design, verification and integration engineers to ensure memory ...
Validate full rack-level performance against per-node targets and identify CPU, memory, NIC, SSD ... Bachelor's or Master's degree inElectrical Engineering, Computer Engineering, or a related field.
Validate full rack-level performance against per-node targets and identify CPU, memory, NIC, SSD ... Bachelor's or Master's degree inElectrical Engineering, Computer Engineering, or a related field.
Validate full rack-level performance against per-node targets and identify CPU, memory, NIC, SSD ... Bachelor's or Master's degree inElectrical Engineering, Computer Engineering, or a related field.
Validate full rack-level performance against per-node targets and identify CPU, memory, NIC, SSD ... Bachelor's or Master's degree inElectrical Engineering, Computer Engineering, or a related field.
As our DRAM Design Validation Engineer, you will be ensuring the successful integration of DRAM ... Description Work with our design, verification and integration engineers to ensure memory ...
As our DRAM Design Validation Engineer, you will be ensuring the successful integration of DRAM ... Description Work with our design, verification and integration engineers to ensure memory ...
Platform Validation Engineer Location: Local to Santa Clara , Onsite work Contract Opportunity ... Set up and run system stress tests (e.g., SPECint, iPerf, FIO, and custom I/O/memory tests)
Platform Validation Engineer Location: Local to Santa Clara , Onsite work Contract Opportunity ... Set up and run system stress tests (e.g., SPECint, iPerf, FIO, and custom I/O/memory tests)
Validation Engineer III
Dunkirk, NY · On-site
... memory T cells for a long-duration response. The Company is applying its science and platforms to ... The Validation Engineer III contributes to moderately complex aspects of a project. Work is ...
Validation Engineer III
Dunkirk, NY · On-site
... memory T cells for a long-duration response. The Company is applying its science and platforms to ... The Validation Engineer III contributes to moderately complex aspects of a project. Work is ...
Automate validation for server systems including memory storage SSDNVMe * Create and maintain ... Programming experience in C * PowerShell scripting for automation and infrastructure management
Quick apply
Automate validation for server systems including memory storage SSDNVMe * Create and maintain ... Programming experience in C * PowerShell scripting for automation and infrastructure management
Validation Engineer III
Dunkirk, NY · On-site
... memory T cells for a long-duration response. The Company is applying its science and platforms to ... The Validation Engineer III contributes to moderately complex aspects of a project. Work is ...
Validation Engineer III
Dunkirk, NY · On-site
... memory T cells for a long-duration response. The Company is applying its science and platforms to ... The Validation Engineer III contributes to moderately complex aspects of a project. Work is ...
Platform Validation Engineer Location: Local to Santa Clara , Onsite work Immediate starter ... Set up and run system stress tests (e.g., SPECint, iPerf, FIO, and custom I/O/memory tests)
Platform Validation Engineer Location: Local to Santa Clara , Onsite work Immediate starter ... Set up and run system stress tests (e.g., SPECint, iPerf, FIO, and custom I/O/memory tests)
Validation Engineer III
Dunkirk, NY · On-site
... memory T cells for a long-duration response. The Company is applying its science and platforms to ... The Validation Engineer III contributes to moderately complex aspects of a project. Work is ...
Validation Engineer III
Dunkirk, NY · On-site
... memory T cells for a long-duration response. The Company is applying its science and platforms to ... The Validation Engineer III contributes to moderately complex aspects of a project. Work is ...
FPGA consists of various IPs as a building block such as SERDES(PMA/PCS), Memory DDR(DDR4, LPDDR4, DDR5 etc), DPHY, PLL, DSP, Fabric, I/O etc.As a Silicon Design Validation engineer, you will have an ...
FPGA consists of various IPs as a building block such as SERDES(PMA/PCS), Memory DDR(DDR4, LPDDR4, DDR5 etc), DPHY, PLL, DSP, Fabric, I/O etc.As a Silicon Design Validation engineer, you will have an ...
Staff Validation Engineer
Tempe, AZ · On-site
... Engineer with a strong background in post silicon validation and characterization. The ideal ... high-speed memory buffer devices. * Collaborate closely with designers and cross-functional ...
Staff Validation Engineer
Tempe, AZ · On-site
... Engineer with a strong background in post silicon validation and characterization. The ideal ... high-speed memory buffer devices. * Collaborate closely with designers and cross-functional ...
... CPUs, GPUs, memory, BIOS, BMC, I/O, storage, networking) - Test bench set up and bench testing ... and UEFI programming and Validation Knowledge on Python or Pearl scripts - Testing automation ...
... CPUs, GPUs, memory, BIOS, BMC, I/O, storage, networking) - Test bench set up and bench testing ... and UEFI programming and Validation Knowledge on Python or Pearl scripts - Testing automation ...
... memory for tomorrow. The goal: to reprogram the patient's immune system and treat the host rather ... Position Summary The Principal Validation Engineer is responsible for coordinating all validation ...
... memory for tomorrow. The goal: to reprogram the patient's immune system and treat the host rather ... Position Summary The Principal Validation Engineer is responsible for coordinating all validation ...
... memory for tomorrow. The goal: to reprogram the patient's immune system and treat the host rather ... Position Summary The Principal Validation Engineer is responsible for coordinating all validation ...
... memory for tomorrow. The goal: to reprogram the patient's immune system and treat the host rather ... Position Summary The Principal Validation Engineer is responsible for coordinating all validation ...
... memory for tomorrow. The goal: to reprogram the patient's immune system and treat the host rather ... Position Summary The Principal Validation Engineer is responsible for coordinating all validation ...
... memory for tomorrow. The goal: to reprogram the patient's immune system and treat the host rather ... Position Summary The Principal Validation Engineer is responsible for coordinating all validation ...
Post Silicon Validation Engineer
Roseville, CA · On-site
$65 - $100/hr
... Memory Controllers, NVMe SSD Controllers, PCIe Switches and SAS Expanders that are applied in Cloud ... A validation engineer develops a comprehensive test plan by utilizing design specifications ...
Post Silicon Validation Engineer
Roseville, CA · On-site
$65 - $100/hr
... Memory Controllers, NVMe SSD Controllers, PCIe Switches and SAS Expanders that are applied in Cloud ... A validation engineer develops a comprehensive test plan by utilizing design specifications ...
FPGA consists of various IPs as a building block such as SERDES(PMA/PCS), Memory DDR(DDR4, LPDDR4, DDR5 etc), DPHY, PLL, DSP, Fabric, I/O etc. As a Silicon Design Validation engineer, you will have ...
FPGA consists of various IPs as a building block such as SERDES(PMA/PCS), Memory DDR(DDR4, LPDDR4, DDR5 etc), DPHY, PLL, DSP, Fabric, I/O etc. As a Silicon Design Validation engineer, you will have ...
... designs and engineer test content for new CPU features. * Create CPU validation test plans ... Understanding of CPU architecture, including instruction sets, pipelines, caches, and memory ...
... designs and engineer test content for new CPU features. * Create CPU validation test plans ... Understanding of CPU architecture, including instruction sets, pipelines, caches, and memory ...
Memory Validation Engineer information
See salary details
$22.60 - $27.64
2% of jobs
$27.64 - $32.69
6% of jobs
$32.69 - $37.74
13% of jobs
$39.32 is the 25th percentile. Wages below this are outliers.
$37.74 - $42.79
13% of jobs
$42.79 - $47.84
11% of jobs
The median wage is $50.36 / hr.
$47.84 - $52.88
12% of jobs
$52.88 - $57.93
9% of jobs
$61.82 is the 75th percentile. Wages above this are outliers.
$57.93 - $62.98
13% of jobs
$62.98 - $68.03
13% of jobs
$68.03 - $73.08
6% of jobs
$73.08 - $78.13
3% of jobs
$22
$51
$78
How much do memory validation engineer jobs pay per hour?
As of Sep 11, 2026, the average hourly pay for memory validation engineer in the United States is $52.00, according to ZipRecruiter salary data. Most workers in this role earn between $39.42 and $63.22 per hour, depending on experience, location, and employer.
What is a memory validation engineer?
A Memory Validation Engineer is a professional who tests and verifies the functionality, performance, and reliability of memory products such as DRAM, SRAM, and flash memory. They develop test plans, execute validation procedures, and analyze data to ensure memory components meet design specifications and industry standards. This role often involves working closely with design, development, and quality assurance teams to identify and resolve issues before products reach the market.
What are the key skills and qualifications needed to thrive as a memory validation engineer?
To thrive as a Memory Validation Engineer, you need a solid background in electrical engineering, computer architecture, and memory technologies, typically supported by a relevant engineering degree. Familiarity with validation tools, scripting languages (such as Python or Perl), test automation frameworks, and lab equipment is essential, along with experience in using protocols like DDR, LPDDR, or PCIe. Strong analytical thinking, problem-solving skills, and effective communication help you identify, analyze, and convey complex technical issues. These skills are crucial for ensuring memory products meet performance and reliability standards, contributing directly to product quality and customer satisfaction.
What are some common challenges faced by memory validation engineers during the product development cycle?
Memory Validation Engineers often encounter challenges such as debugging complex failures that can originate from various sources, including hardware, firmware, or test environments. Coordinating with cross-functional teams like design, firmware, and test engineering is crucial to rapidly identify and resolve issues. Additionally, staying updated on evolving memory technologies and standards requires continuous learning. Effective documentation and communication of test results are also key responsibilities, ensuring that potential issues are clearly conveyed to other teams for resolution.
What is the difference between Memory Validation Engineer vs Memory Test Engineer?
| Aspect | Memory Validation Engineer | Memory Test Engineer |
|---|---|---|
| Certifications | Typically requires a degree in Electrical Engineering, Computer Engineering, or related fields; certifications like ISTQB may be beneficial | Similar educational background; certifications like ISTQB are common |
| Work Environment | Works in R&D, validation labs, or quality assurance teams within semiconductor or electronics companies | Works in testing labs, product development teams, or quality assurance within similar industries |
| Industry Usage | Used in semiconductor, electronics, and hardware development companies | Common in electronics manufacturing, hardware design, and testing firms |
Both roles focus on testing and validating memory components, but Memory Validation Engineers typically handle comprehensive validation processes, including design verification and compliance testing, while Memory Test Engineers focus more on executing test plans and troubleshooting memory modules during production or development.
What are popular job titles related to Memory Validation Engineer jobs?
For Memory Validation Engineer jobs, the most frequently searched job titles are:
Application Test Engineer
San Jose, CA • On-site
SK hynix America
• Semiconductor and Electronic Component Manufacturing • 201 - 500 employees201 - 500 employees
Full-time
Medical, Retirement, PTO
Re-posted 8 days ago
Job description
Job Summary:
SK hynix America is looking for an Application Test Engineer to join our DRAM Engineering Team in San Jose, CA. The Application Test Engineer will be responsible for technical support, primarily handling technical issues from customers and partners, joint validation efforts, self-qualifications, as well as supporting local customer engineering teams. Key emphasis will be on troubleshooting urgent problems, the detection of potential issues during the early stage of a product, and the coordination with internal R&D teams. This position will provide the candidate with in-depth, hands-on experience with our memory products.
Responsibilities:
- Architect Validation Frameworks: Define, document, and oversee comprehensive test plans for both CPU validation and system-level platform qualification.
- Drive test automation: Spearhead the development of scalable automation scripts and frameworks to accelerate regression testing and stress testing across multiple server configurations.
- Ability to use measurement equipment (Oscilloscope, Logic Analyzer).
- Partner effectively with key customers on memory validation and technical troubleshooting to diagnose the root cause of system memory failures.
- Proactively create experiments and tooling to detect and diagnose memory issues.
- Develop and publish updates on resolutions and communicate findings internally.
- Drive necessary discussions with external and internal teams on test specifications and methodologies to improve test quality continuously.
- Complete other responsibilities as assigned.
Qualifications:
- Bachelor's in Electrical/Computer Engineering or Computer Science with 3+ years of working experience in system and memory validation.
- Proven experience with design, simulation, debugging, and performance analysis of CPU-DRAM Memory.
- Strong bring-up and debugging skills and hands-on lab work. Experience with complex test equipment.
- Experience in CPU and Memory validation from planning to closure.
- Good understanding of validation flows and tools.
- Experience with Spotfire and summarizing test data and analysis.
- Understanding and Experience in computing server applications.
- Self-motivated problem-solver with an ability to work well in a team.
- Highly motivated with good verbal and written communication skills.
Requirement:
- Authorized to work in the US
Benefits:
- Top Tier health insurance at no employee cost
- Paid day offs: Paid Time Off, Company Holidays, Parental Leave, Happy Fridays
- 401k Matching
- Flexible Spending Account (FSA) for Health Care & Dependent Care
- Educational reimbursement up to $10,000 per year
- Donation Matching and volunteering opportunities
- Corporate discount programs
- Free Breakfast/Lunch/Dinner provided to employees
About SK Hynix America
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
201 - 500 Employees
Headquarters location
San Jose, CA, US
Year founded
1983